From: Matt Turner <mattst88@gmail.com>
Date: Sat, 11 Apr 2015 21:51:13 +0000 (-0700)
Subject: i965/fs: Set compression only if writing two registers.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=8bc49f9536058a8373d3057324e22fcbf79a7d89;p=mesa.git

i965/fs: Set compression only if writing two registers.

We don't want to set compression control on a SIMD16 instruction
operating on words or smaller.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
---

diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
index af08f9d6d07..397d8257a91 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
@@ -1631,7 +1631,10 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width)
          break;
       case 16:
       case 32:
-         brw_set_default_compression_control(p, BRW_COMPRESSION_COMPRESSED);
+         if (type_sz(inst->dst.type) < sizeof(float))
+            brw_set_default_compression_control(p, BRW_COMPRESSION_NONE);
+         else
+            brw_set_default_compression_control(p, BRW_COMPRESSION_COMPRESSED);
          break;
       default:
          unreachable("Invalid instruction width");