From: Eric Anholt <eric@anholt.net>
Date: Thu, 6 May 2010 20:20:44 +0000 (-0700)
Subject: ir_to_mesa: Add exp/log expression operations.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=8c29a1d84d738cfddf16d5f013876ee2cca96a81;p=mesa.git

ir_to_mesa: Add exp/log expression operations.
---

diff --git a/ir_to_mesa.cpp b/ir_to_mesa.cpp
index bc9ad252d02..3fed1577796 100644
--- a/ir_to_mesa.cpp
+++ b/ir_to_mesa.cpp
@@ -319,6 +319,18 @@ ir_to_mesa_visitor::visit(ir_expression *ir)
    this->result = NULL;
 
    switch (ir->operation) {
+   case ir_unop_exp:
+      this->result = this->create_tree(MB_TERM_exp_vec4, ir, op[0], NULL);
+      break;
+   case ir_unop_exp2:
+      this->result = this->create_tree(MB_TERM_exp2_vec4, ir, op[0], NULL);
+      break;
+   case ir_unop_log:
+      this->result = this->create_tree(MB_TERM_log_vec4, ir, op[0], NULL);
+      break;
+   case ir_unop_log2:
+      this->result = this->create_tree(MB_TERM_log2_vec4, ir, op[0], NULL);
+      break;
    case ir_binop_add:
       this->result = this->create_tree(MB_TERM_add_vec4_vec4, ir, op[0], op[1]);
       break;
diff --git a/mesa_codegen.brg b/mesa_codegen.brg
index 0bfd8dae903..ed9afdc57cd 100644
--- a/mesa_codegen.brg
+++ b/mesa_codegen.brg
@@ -48,6 +48,10 @@
 # generate in its trees.
 %term assign
 %term reference_vec4
+%term exp_vec4
+%term exp2_vec4
+%term log_vec4
+%term log2_vec4
 %term add_vec4_vec4
 %term sub_vec4_vec4
 %term mul_vec4_vec4
@@ -205,4 +209,32 @@ vec4: sqrt_vec4(vec4) 1
 			    tree->src_reg);
 }
 
+vec4: exp_vec4(vec4) 1
+{
+	ir_to_mesa_emit_scalar_op1(tree, OPCODE_EXP,
+				   tree->dst_reg,
+				   tree->left->src_reg);
+}
+
+vec4: exp2_vec4(vec4) 1
+{
+	ir_to_mesa_emit_scalar_op1(tree, OPCODE_EX2,
+				   tree->dst_reg,
+				   tree->left->src_reg);
+}
+
+vec4: log_vec4(vec4) 1
+{
+	ir_to_mesa_emit_scalar_op1(tree, OPCODE_LOG,
+				   tree->dst_reg,
+				   tree->left->src_reg);
+}
+
+vec4: log2_vec4(vec4) 1
+{
+	ir_to_mesa_emit_scalar_op1(tree, OPCODE_LG2,
+				   tree->dst_reg,
+				   tree->left->src_reg);
+}
+
 %%