From: bugzilla-daemon <bugzilla-daemon@libre-riscv.org>
Date: Fri, 3 Apr 2020 13:58:51 +0000 (+0000)
Subject: [libre-riscv-dev] [Bug 276] SR NAND Latch needed in nmigen
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=8c4fc530d462c7cb7708798fa993da95f5f9bdf6;p=libre-riscv-dev.git

[libre-riscv-dev] [Bug 276] SR NAND Latch needed in nmigen
---

diff --git a/b6/1ef080bdfd3f4196d915daddf65fdc06f1083a b/b6/1ef080bdfd3f4196d915daddf65fdc06f1083a
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+Date: Fri, 03 Apr 2020 13:58:51 +0000
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+X-Bugzilla-Severity: enhancement
+X-Bugzilla-Who: lkcl@lkcl.net
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+Message-ID: <bug-276-13-Tx2f8vY3lM@http.bugs.libre-riscv.org/>
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+Subject: [libre-riscv-dev] [Bug 276] SR NAND Latch needed in nmigen
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