From: Andrew Waterman <waterman@cs.berkeley.edu>
Date: Fri, 12 Feb 2016 18:58:43 +0000 (-0800)
Subject: Fix ERET bug
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=8cb6f2ed8b53089f347f3215c0e612e383224d1f;p=riscv-isa-sim.git

Fix ERET bug
---

diff --git a/riscv/insns/sret.h b/riscv/insns/sret.h
index c3561d3..f317d14 100644
--- a/riscv/insns/sret.h
+++ b/riscv/insns/sret.h
@@ -11,6 +11,6 @@ reg_t pie = get_field(s, MSTATUS_UPIE << STATE.prv);
 reg_t prev_prv = get_field(s, STATE.prv == PRV_S ? MSTATUS_SPP : MSTATUS_MPP);
 s = set_field(s, MSTATUS_UIE << prev_prv, pie); // [[prv]PP]IE = [prv]PIE
 s = set_field(s, MSTATUS_UPIE << STATE.prv, 0); // [prv]PIE <- 0
-p->set_privilege(prev_prv); // prv <- [prv]PP
 s = set_field(s, STATE.prv == PRV_S ? MSTATUS_SPP : MSTATUS_MPP, PRV_U); // [prv]PP = U
+p->set_privilege(prev_prv); // prv <- [prv]PP
 p->set_csr(CSR_MSTATUS, s);