From: Lionel Landwerlin Date: Mon, 8 Aug 2016 19:30:08 +0000 (+0100) Subject: anv/pipeline/gen7: Set multisample modes X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=8cde4ddbce330a45d27a350c7f4f18641d34fdd8;p=mesa.git anv/pipeline/gen7: Set multisample modes Fixes the following failures : dEQP-VK.api.copy_and_blit.resolve_image.whole_4_bit dEQP-VK.api.copy_and_blit.resolve_image.whole_8_bit dEQP-VK.api.copy_and_blit.resolve_image.partial_4_bit dEQP-VK.api.copy_and_blit.resolve_image.partial_8_bit dEQP-VK.api.copy_and_blit.resolve_image.with_regions_4_bit dEQP-VK.api.copy_and_blit.resolve_image.with_regions_8_bit Tested on IVB/HSW Signed-off-by: Lionel Landwerlin Reviewed-by: Anuj Phogat Reviewed-by: Jason Ekstrand --- diff --git a/src/intel/vulkan/gen7_pipeline.c b/src/intel/vulkan/gen7_pipeline.c index 1da28c03d54..135281d64af 100644 --- a/src/intel/vulkan/gen7_pipeline.c +++ b/src/intel/vulkan/gen7_pipeline.c @@ -68,7 +68,7 @@ genX(graphics_pipeline_create)( assert(pCreateInfo->pRasterizationState); emit_rs_state(pipeline, pCreateInfo->pRasterizationState, - pass, subpass, extra); + pCreateInfo->pMultisampleState, pass, subpass, extra); emit_ds_state(pipeline, pCreateInfo->pDepthStencilState, pass, subpass); @@ -85,7 +85,8 @@ genX(graphics_pipeline_create)( pCreateInfo->pMultisampleState->rasterizationSamples > 1) anv_finishme("VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO"); - uint32_t samples = 1; + uint32_t samples = pCreateInfo->pMultisampleState ? + pCreateInfo->pMultisampleState->rasterizationSamples : 1; uint32_t log2_samples = __builtin_ffs(samples) - 1; anv_batch_emit(&pipeline->batch, GENX(3DSTATE_MULTISAMPLE), ms) { @@ -273,6 +274,11 @@ genX(graphics_pipeline_create)( } wm.BarycentricInterpolationMode = wm_prog_data->barycentric_interp_modes; + + wm.MultisampleRasterizationMode = samples > 1 ? + MSRASTMODE_ON_PATTERN : MSRASTMODE_OFF_PIXEL; + wm.MultisampleDispatchMode = wm_prog_data->persample_dispatch ? + MSDISPMODE_PERSAMPLE : MSDISPMODE_PERPIXEL; } } diff --git a/src/intel/vulkan/gen8_pipeline.c b/src/intel/vulkan/gen8_pipeline.c index d16ce7b9690..1840ce231e6 100644 --- a/src/intel/vulkan/gen8_pipeline.c +++ b/src/intel/vulkan/gen8_pipeline.c @@ -120,7 +120,7 @@ genX(graphics_pipeline_create)( emit_ia_state(pipeline, pCreateInfo->pInputAssemblyState, extra); assert(pCreateInfo->pRasterizationState); emit_rs_state(pipeline, pCreateInfo->pRasterizationState, - pass, subpass, extra); + pCreateInfo->pMultisampleState, pass, subpass, extra); emit_ms_state(pipeline, pCreateInfo->pMultisampleState); emit_ds_state(pipeline, pCreateInfo->pDepthStencilState, pass, subpass); emit_cb_state(pipeline, pCreateInfo->pColorBlendState, diff --git a/src/intel/vulkan/genX_pipeline_util.h b/src/intel/vulkan/genX_pipeline_util.h index 0aa85ba1148..d3b15d9162e 100644 --- a/src/intel/vulkan/genX_pipeline_util.h +++ b/src/intel/vulkan/genX_pipeline_util.h @@ -365,6 +365,7 @@ static const uint32_t vk_to_gen_front_face[] = { static void emit_rs_state(struct anv_pipeline *pipeline, const VkPipelineRasterizationStateCreateInfo *rs_info, + const VkPipelineMultisampleStateCreateInfo *ms_info, const struct anv_render_pass *pass, const struct anv_subpass *subpass, const struct anv_graphics_pipeline_create_info *extra) @@ -396,6 +397,10 @@ emit_rs_state(struct anv_pipeline *pipeline, raster.DXMultisampleRasterizationEnable = true; raster.ForcedSampleCount = FSC_NUMRASTSAMPLES_0; raster.ForceMultisampling = false; +#else + raster.MultisampleRasterizationMode = + (ms_info && ms_info->rasterizationSamples > 1) ? + MSRASTMODE_ON_PATTERN : MSRASTMODE_OFF_PIXEL; #endif raster.FrontWinding = vk_to_gen_front_face[rs_info->frontFace];