From: Gabe Black <gblack@eecs.umich.edu>
Date: Mon, 27 Aug 2007 03:41:36 +0000 (-0700)
Subject: X86: Make the Ruflag microop work correctly, and make the code a little clearer.
X-Git-Tag: m5_2.0_beta4~164
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=8d1c7a83d7c052ba312a21ff6c6b8967b1e4b5f4;p=gem5.git

X86: Make the Ruflag microop work correctly, and make the code a little clearer.

--HG--
extra : convert_revision : c551f51cdda46df99370363ed2d70916db8413eb
---

diff --git a/src/arch/x86/isa/microops/regop.isa b/src/arch/x86/isa/microops/regop.isa
index b91c77c21..616f7a5fc 100644
--- a/src/arch/x86/isa/microops/regop.isa
+++ b/src/arch/x86/isa/microops/regop.isa
@@ -652,10 +652,10 @@ let {{
     defineMicroRegOpRd('Rdip', 'DestReg = RIP')
     defineMicroRegOpRd('Ruflags', 'DestReg = ccFlagBits')
     defineMicroRegOpRdImm('Ruflag', '''
-            int flag = bits(ccFlagBits, (1 << imm8) + 0*psrc1);
+            int flag = bits(ccFlagBits, imm8 + 0*psrc1);
             DestReg = merge(DestReg, flag, dataSize);
-            ccFlagBits = ccFlagBits & ~EZFBit;
-            ccFlagBits = ccFlagBits | ((flag == 0) ? EZFBit : 0);
+            ccFlagBits = (flag == 0) ? (ccFlagBits | EZFBit) :
+                                       (ccFlagBits & ~EZFBit);
             ''')
 
     defineMicroRegOpImm('Sext', '''