From: lkcl <lkcl@web>
Date: Sun, 19 Jun 2022 13:57:58 +0000 (+0100)
Subject: (no commit message)
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=8d6216ed93cdf0c1f23febae01b43f828f726747;p=libreriscv.git

---

diff --git a/openpower/sv.mdwn b/openpower/sv.mdwn
index 02f78aecb..f69b5fd15 100644
--- a/openpower/sv.mdwn
+++ b/openpower/sv.mdwn
@@ -10,7 +10,8 @@ Obligatory Dilbert:
 
 **SV is in DRAFT STATUS**. SV has not yet been submitted to the OpenPOWER Foundation ISA WG for review.
 
-<https://bugs.libre-soc.org/show_bug.cgi?id=213>
+* <https://bugs.libre-soc.org/show_bug.cgi?id=213>
+* <https://youtu.be/ZQ5hw9AwO1U> walkthrough video (19jun2022)
 
 SV is designed as a Scalable Vector ISA for Hybrid 3D CPU GPU VPU workloads.
 As such it brings features normally only found in Cray Supercomputers