From: Chad Versace <chad.versace@intel.com>
Date: Tue, 5 Jan 2016 19:35:44 +0000 (-0800)
Subject: isl: Don't force linear for 1d surfaces in gen7_filter_tiling()
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=8d6f0a1b8020c9ab33a56d3aacdbc641d20fdacf;p=mesa.git

isl: Don't force linear for 1d surfaces in gen7_filter_tiling()

gen7_filter_tiling() should filter out only tiling flags that are
incompatible with the surface. It shouldn't make performance decisions,
such as forcing linear for 1D; that's the role of the caller.
---

diff --git a/src/isl/isl_gen7.c b/src/isl/isl_gen7.c
index 4484abb8191..7064e852e65 100644
--- a/src/isl/isl_gen7.c
+++ b/src/isl/isl_gen7.c
@@ -265,14 +265,6 @@ gen7_filter_tiling(const struct isl_device *dev,
       *flags &= (ISL_TILING_ANY_Y_MASK | ISL_TILING_W_BIT);
    }
 
-   /* For 1D surfaces, use linear when possible. 1D surfaces (array and
-    * non-array) do not benefit from tiling. In fact, it leads to less
-    * efficient use of memory due to tile alignment.
-    */
-   if (info->dim == ISL_SURF_DIM_1D && (*flags & ISL_TILING_LINEAR_BIT)) {
-      *flags = ISL_TILING_LINEAR_BIT;
-   }
-
    /* workaround */
    if (ISL_DEV_GEN(dev) == 7 &&
        gen7_format_needs_valign2(dev, info->format) &&