From: Richard Sandiford <richard.sandiford@arm.com>
Date: Tue, 2 Jun 2015 08:29:42 +0000 (+0000)
Subject: constraints.md: Use lower-case names in match_code.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=8da140e0e4b0af9d2f9fa09797bb30619ba395d2;p=gcc.git

constraints.md: Use lower-case names in match_code.

gcc/
	* config/arc/constraints.md: Use lower-case names in match_code.
	* config/mmix/constraints.md: Likewise.

From-SVN: r224014
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index d7597c79a65..3a01820579a 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2015-06-02  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* config/arc/constraints.md: Use lower-case names in match_code.
+	* config/mmix/constraints.md: Likewise.
+
 2015-06-02  Richard Biener  <rguenther@suse.de>
 
 	PR tree-optimization/65961
diff --git a/gcc/config/arc/constraints.md b/gcc/config/arc/constraints.md
index 9153062c363..9540075f369 100644
--- a/gcc/config/arc/constraints.md
+++ b/gcc/config/arc/constraints.md
@@ -335,7 +335,7 @@
    Cryptic q - for short insn generation while not affecting register allocation
    Registers usable in ARCompact 16-bit instructions: @code{r0}-@code{r3},
    @code{r12}-@code{r15}"
-  (and (match_code "REG")
+  (and (match_code "reg")
        (match_test "TARGET_Rcq
 		    && !arc_ccfsm_cond_exec_p ()
 		    && IN_RANGE (REGNO (op) ^ 4, 4, 11)")))
@@ -347,7 +347,7 @@
 (define_constraint "Rcw"
   "@internal
    Cryptic w - for use in early alternatives with matching constraint"
-  (and (match_code "REG")
+  (and (match_code "reg")
        (match_test
 	"TARGET_Rcw
 	 && REGNO (op) < FIRST_PSEUDO_REGISTER
@@ -357,7 +357,7 @@
 (define_constraint "Rcr"
   "@internal
    Cryptic r - for use in early alternatives with matching constraint"
-  (and (match_code "REG")
+  (and (match_code "reg")
        (match_test
 	"TARGET_Rcw
 	 && REGNO (op) < FIRST_PSEUDO_REGISTER
@@ -367,13 +367,13 @@
 (define_constraint "Rcb"
   "@internal
    Stack Pointer register @code{r28} - do not reload into its class"
-  (and (match_code "REG")
+  (and (match_code "reg")
        (match_test "REGNO (op) == 28")))
 
 (define_constraint "Rck"
   "@internal
    blink (usful for push_s / pop_s)"
-  (and (match_code "REG")
+  (and (match_code "reg")
        (match_test "REGNO (op) == 31")))
 
 (define_constraint "Rs5"
@@ -381,7 +381,7 @@
    sibcall register - only allow one of the five available 16 bit isnsn.
    Registers usable in ARCompact 16-bit instructions: @code{r0}-@code{r3},
    @code{r12}"
-  (and (match_code "REG")
+  (and (match_code "reg")
        (match_test "!arc_ccfsm_cond_exec_p ()")
        (ior (match_test "(unsigned) REGNO (op) <= 3")
 	    (match_test "REGNO (op) == 12"))))
@@ -389,7 +389,7 @@
 (define_constraint "Rcc"
   "@internal
   Condition Codes"
-  (and (match_code "REG") (match_test "cc_register (op, VOIDmode)")))
+  (and (match_code "reg") (match_test "cc_register (op, VOIDmode)")))
 
 
 (define_constraint "Q"
diff --git a/gcc/config/mmix/constraints.md b/gcc/config/mmix/constraints.md
index 569b2e5dc70..f2721f7427f 100644
--- a/gcc/config/mmix/constraints.md
+++ b/gcc/config/mmix/constraints.md
@@ -89,8 +89,8 @@
   (and (not (match_code "const_int,const_double"))
        (match_test "mmix_constant_address_p (op)")
        (ior (match_test "!TARGET_BASE_ADDRESSES")
-	    (match_code "LABEL_REF")
-	    (and (match_code "SYMBOL_REF")
+	    (match_code "label_ref")
+	    (and (match_code "symbol_ref")
 		 (match_test "SYMBOL_REF_FLAG (op)")))))
 
 ;; FIXME: L (or S) is redundant.