From: Luke Kenneth Casson Leighton Date: Sun, 10 Oct 2021 11:15:11 +0000 (+0100) Subject: fix SimdSignal Repl test (was previously unfinished) X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=8db716e8227fad2ea78be493733fc598d8531679;p=ieee754fpu.git fix SimdSignal Repl test (was previously unfinished) --- diff --git a/src/ieee754/part/test/test_partsig.py b/src/ieee754/part/test/test_partsig.py index dcf0231c..1e3c457b 100644 --- a/src/ieee754/part/test/test_partsig.py +++ b/src/ieee754/part/test/test_partsig.py @@ -455,26 +455,26 @@ class TestRepl(unittest.TestCase): def async_process(): def test_replop(msg_prefix): - # define lengths of a/b test input - alen, blen = 16, 32 - # pairs of test values a, b - for a, b in [(0x0000, 0x00000000), - (0xDCBA, 0x12345678), - (0xABCD, 0x01234567), - (0xFFFF, 0x0000), - (0x0000, 0x0000), - (0x1F1F, 0xF1F1F1F1), - (0x0000, 0xFFFFFFFF)]: + # define length of a test input + alen = 16 + # test values a + for a in [0x0000, + 0xDCBA, + 0x1234, + 0xABCD, + 0xFFFF, + 0x0000, + 0x1F1F, + 0xF1F1, + ]: - # convert a and b to partitions - apart, bpart = [], [] - ajump, bjump = alen // 4, blen // 4 + # convert a to partitions + apart = [] + ajump = alen // 4 for i in range(4): apart.append((a >> (ajump*i) & ((1<> (bjump*i) & ((1< 0x{y:X} != 0x{outval:X}" self.assertEqual(y, outval, msg)