From: Shriya Sharma Date: Tue, 17 Oct 2023 13:31:14 +0000 (+0100) Subject: added english language description for lhaup instruction in the pifixedload.mdwm X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=8dc3687518e92e94f1c4e08ec05d4b35b40cae52;p=openpower-isa.git added english language description for lhaup instruction in the pifixedload.mdwm --- diff --git a/openpower/isa/pifixedload.mdwn b/openpower/isa/pifixedload.mdwn index bb8d37df..5d4df69a 100644 --- a/openpower/isa/pifixedload.mdwn +++ b/openpower/isa/pifixedload.mdwn @@ -130,6 +130,10 @@ Description: The halfword in storage addressed by EA is loaded into RT[48:63]. RT[0:47] are filled with a copy of bit 0 of the loaded halfword. + The sum (RA) + D is placed into register RA. + + If RA=0 or RA=RT, the instruction form is invalid. + Special Registers Altered: None @@ -152,6 +156,8 @@ Description: The halfword in storage addressed by EA is loaded into RT[48:63]. RT[0:47] are filled with a copy of bit 0 of the loaded halfword. + The sum (RA) + (RB) is placed into register RA. + Special Registers Altered: None