From: Sebastien Bourdeauducq <sb@m-labs.hk>
Date: Fri, 8 Aug 2014 13:56:35 +0000 (+0800)
Subject: dfii: drive ODT and RESET_N
X-Git-Tag: 24jan2021_ls180~2675
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=8deadc57604c19bcb4f99053daa93d163c057dba;p=litex.git

dfii: drive ODT and RESET_N
---

diff --git a/misoclib/dfii/__init__.py b/misoclib/dfii/__init__.py
index 22a5bcd5..69d45ad0 100644
--- a/misoclib/dfii/__init__.py
+++ b/misoclib/dfii/__init__.py
@@ -40,7 +40,7 @@ class DFIInjector(Module, AutoCSR):
 		self.slave = dfi.Interface(a, ba, d, nphases)
 		self.master = dfi.Interface(a, ba, d, nphases)
 		
-		self._control = CSRStorage(2) # sel, cke
+		self._control = CSRStorage(4) # sel, cke, odt, reset_n
 		
 		for n, phase in enumerate(inti.phases):
 			setattr(self.submodules, "pi" + str(n), PhaseInjector(phase))
@@ -53,3 +53,5 @@ class DFIInjector(Module, AutoCSR):
 				inti.connect(self.master)
 			)
 		self.comb += [phase.cke.eq(self._control.storage[1]) for phase in inti.phases]
+		self.comb += [phase.odt.eq(self._control.storage[2]) for phase in inti.phases if hasattr(phase, "odt")]
+		self.comb += [phase.reset_n.eq(self._control.storage[3]) for phase in inti.phases if hasattr(phase, "reset_n")]
diff --git a/software/include/hw/flags.h b/software/include/hw/flags.h
index 7b0db6eb..01682e4c 100644
--- a/software/include/hw/flags.h
+++ b/software/include/hw/flags.h
@@ -4,8 +4,10 @@
 #define UART_EV_TX	0x1
 #define UART_EV_RX	0x2
 
-#define DFII_CONTROL_SEL	0x01
-#define DFII_CONTROL_CKE	0x02
+#define DFII_CONTROL_SEL		0x01
+#define DFII_CONTROL_CKE		0x02
+#define DFII_CONTROL_ODT		0x04
+#define DFII_CONTROL_RESET_N	0x08
 
 #define DFII_COMMAND_CS		0x01
 #define DFII_COMMAND_WE		0x02