From: Tobias Platen <tplaten@posteo.de>
Date: Thu, 9 Dec 2021 17:32:13 +0000 (+0100)
Subject: implement main part of test_loadstore1_ifetch_invalid()
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=8e44607c82a64e3890236d767436426231178ea0;p=soc.git

implement main part of test_loadstore1_ifetch_invalid()
---

diff --git a/src/soc/experiment/test/test_loadstore1.py b/src/soc/experiment/test/test_loadstore1.py
index a4a82177..38c06296 100644
--- a/src/soc/experiment/test/test_loadstore1.py
+++ b/src/soc/experiment/test/test_loadstore1.py
@@ -484,6 +484,28 @@ def _test_loadstore1_ifetch_invalid(dut, mem):
     yield
     yield
 
+    print("=== test invalid loadstore instruction (instruction fault) ===")
+
+    virt_addr = 0x10200
+
+    yield ldst.priv_mode.eq(0)
+    yield ldst.instr_fault.eq(1)
+    yield ldst.maddr.eq(virt_addr)
+    #ld_data, exctype, exc = yield from pi_ld(pi, virt_addr, 8, msr_pr=1)
+    yield
+    yield ldst.instr_fault.eq(0)
+    while True:
+        done = yield (ldst.done)
+        exc_info = yield from get_exception_info(pi.exc_o)
+        if done or exc_info.happened:
+            break
+        yield
+    assert exc_info.happened == 1 # different here as expected
+    yield ldst.instr_fault.eq(0)
+    yield
+    yield
+    yield
+
     wbget.stop = True