From: Richard Biener <rguenther@suse.de>
Date: Thu, 15 Aug 2019 12:44:23 +0000 (+0000)
Subject: re PR target/91454 (ICE in get_attr_avx_partial_xmm_update, at config/i386/i386.md... 
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=8ed1d2fa2bbda6d1365e5cba90abb42eac84bc04;p=gcc.git

re PR target/91454 (ICE in get_attr_avx_partial_xmm_update, at config/i386/i386.md:1804 since r274481)

2019-08-15  Richard Biener  <rguenther@suse.de>

	PR target/91454
	* config/i386/i386-features.c (gen_gpr_to_xmm_move_src): New
	helper.
	(general_scalar_chain::make_vector_copies): Use it.

From-SVN: r274535
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 2aa7a8cba19..458caa5a89e 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2019-08-15  Richard Biener  <rguenther@suse.de>
+
+	PR target/91454
+	* config/i386/i386-features.c (gen_gpr_to_xmm_move_src): New
+	helper.
+	(general_scalar_chain::make_vector_copies): Use it.
+
 2019-08-15  Bernd Edlinger  <bernd.edlinger@hotmail.de>
 
 	* function.c (assign_parm_setup_reg): Handle misaligned stack arguments.
diff --git a/gcc/config/i386/i386-features.c b/gcc/config/i386/i386-features.c
index f622ac79ab9..cead2077e48 100644
--- a/gcc/config/i386/i386-features.c
+++ b/gcc/config/i386/i386-features.c
@@ -658,6 +658,25 @@ scalar_chain::emit_conversion_insns (rtx insns, rtx_insn *after)
   emit_insn_after (insns, BB_HEAD (new_bb));
 }
 
+/* Generate the canonical SET_SRC to move GPR to a VMODE vector register,
+   zeroing the upper parts.  */
+
+static rtx
+gen_gpr_to_xmm_move_src (enum machine_mode vmode, rtx gpr)
+{
+  switch (GET_MODE_NUNITS (vmode))
+    {
+    case 1:
+      return gen_rtx_SUBREG (vmode, gpr, 0);
+    case 2:
+      return gen_rtx_VEC_CONCAT (vmode, gpr,
+				 CONST0_RTX (GET_MODE_INNER (vmode)));
+    default:
+      return gen_rtx_VEC_MERGE (vmode, gen_rtx_VEC_DUPLICATE (vmode, gpr),
+				CONST0_RTX (vmode), GEN_INT (HOST_WIDE_INT_1U));
+    }
+}
+
 /* Make vector copies for all register REGNO definitions
    and replace its uses in a chain.  */
 
@@ -684,13 +703,8 @@ general_scalar_chain::make_vector_copies (unsigned regno)
 	      }
 	    else
 	      emit_move_insn (tmp, reg);
-	    emit_insn (gen_rtx_SET
-		        (gen_rtx_SUBREG (vmode, vreg, 0),
-			 gen_rtx_VEC_MERGE (vmode,
-					    gen_rtx_VEC_DUPLICATE (vmode,
-								   tmp),
-					    CONST0_RTX (vmode),
-					    GEN_INT (HOST_WIDE_INT_1U))));
+	    emit_insn (gen_rtx_SET (gen_rtx_SUBREG (vmode, vreg, 0),
+				    gen_gpr_to_xmm_move_src (vmode, tmp)));
 	  }
 	else if (!TARGET_64BIT && smode == DImode)
 	  {
@@ -720,13 +734,8 @@ general_scalar_chain::make_vector_copies (unsigned regno)
 	      }
 	  }
 	else
-	  emit_insn (gen_rtx_SET
-		       (gen_rtx_SUBREG (vmode, vreg, 0),
-			gen_rtx_VEC_MERGE (vmode,
-					   gen_rtx_VEC_DUPLICATE (vmode,
-								  reg),
-					   CONST0_RTX (vmode),
-					   GEN_INT (HOST_WIDE_INT_1U))));
+	  emit_insn (gen_rtx_SET (gen_rtx_SUBREG (vmode, vreg, 0),
+				  gen_gpr_to_xmm_move_src (vmode, reg)));
 	rtx_insn *seq = get_insns ();
 	end_sequence ();
 	rtx_insn *insn = DF_REF_INSN (ref);