From: Sebastien Bourdeauducq Date: Mon, 25 Mar 2013 14:56:54 +0000 (+0100) Subject: fb: better ordering of pixels within ASMI words X-Git-Tag: 24jan2021_ls180~2998 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=8ee6dab4f9eabc63c55485274845a2505211bde6;p=litex.git fb: better ordering of pixels within ASMI words --- diff --git a/milkymist/framebuffer/__init__.py b/milkymist/framebuffer/__init__.py index 4bb4dd9f..617bb003 100644 --- a/milkymist/framebuffer/__init__.py +++ b/milkymist/framebuffer/__init__.py @@ -13,9 +13,9 @@ _vbits = 11 _bpp = 32 _bpc = 10 _pixel_layout = [ - ("b", _bpc), - ("g", _bpc), ("r", _bpc), + ("g", _bpc), + ("b", _bpc), ("pad", _bpp-3*_bpc) ] @@ -23,9 +23,9 @@ _bpc_dac = 8 _dac_layout = [ ("hsync", 1), ("vsync", 1), - ("b", _bpc_dac), + ("r", _bpc_dac), ("g", _bpc_dac), - ("r", _bpc_dac) + ("b", _bpc_dac) ] class _FrameInitiator(spi.SingleGenerator): @@ -173,7 +173,7 @@ class Framebuffer(Module): adrbuffer = AbstractActor(plumbing.Buffer) dma = dma_asmi.Reader(asmiport) datbuffer = AbstractActor(plumbing.Buffer) - cast = structuring.Cast(asmiport.hub.dw, packed_pixels) + cast = structuring.Cast(asmiport.hub.dw, packed_pixels, reverse_to=True) unpack = structuring.Unpack(pack_factor, _pixel_layout) vtg = VTG() if simulation: