From: Clifford Wolf <clifford@clifford.at>
Date: Fri, 26 Apr 2013 12:40:25 +0000 (+0200)
Subject: Fixed handling of positional module parameters
X-Git-Tag: yosys-0.2.0~644
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=8f2d90de4ffa4f0e919078649777a5eeeede6b46;p=yosys.git

Fixed handling of positional module parameters
---

diff --git a/frontends/ast/ast.cc b/frontends/ast/ast.cc
index 0bd1ba2e0..2c552ea22 100644
--- a/frontends/ast/ast.cc
+++ b/frontends/ast/ast.cc
@@ -801,10 +801,10 @@ RTLIL::IdString AstModule::derive(RTLIL::Design *design, std::map<RTLIL::IdStrin
 			continue;
 		para_counter++;
 		std::string para_id = child->str;
-		if (parameters.count(child->str) > 0) {
+		if (parameters.count(para_id) > 0) {
 			log("Parameter %s = %s\n", child->str.c_str(), log_signal(RTLIL::SigSpec(parameters[child->str])));
 	rewrite_parameter:
-			para_info += stringf("%s=%s", child->str.c_str(), log_signal(RTLIL::SigSpec(parameters[child->str])));
+			para_info += stringf("%s=%s", child->str.c_str(), log_signal(RTLIL::SigSpec(parameters[para_id])));
 			child->delete_children();
 			child->children.push_back(AstNode::mkconst_bits(parameters[para_id].bits, false));
 			hash_data.insert(hash_data.end(), child->str.begin(), child->str.end());
@@ -814,10 +814,8 @@ RTLIL::IdString AstModule::derive(RTLIL::Design *design, std::map<RTLIL::IdStrin
 			parameters.erase(para_id);
 			continue;
 		}
-		char buf[100];
-		snprintf(buf, 100, "$%d", para_counter);
-		if (parameters.count(buf) > 0) {
-			para_id = buf;
+		para_id = stringf("$%d", para_counter);
+		if (parameters.count(para_id) > 0) {
 			log("Parameter %d (%s) = %s\n", para_counter, child->str.c_str(), log_signal(RTLIL::SigSpec(parameters[para_id])));
 			goto rewrite_parameter;
 		}