From: lkcl <lkcl@web>
Date: Thu, 31 Oct 2019 21:28:07 +0000 (+0000)
Subject: (no commit message)
X-Git-Tag: convert-csv-opcode-to-binary~3837
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=8f33d447d3e2114c6dec0920d1634cd338d59334;p=libreriscv.git

---

diff --git a/openpower.mdwn b/openpower.mdwn
index 200d924c3..e1f717826 100644
--- a/openpower.mdwn
+++ b/openpower.mdwn
@@ -70,3 +70,12 @@ If certain alternative configs are expected, they are part of the function ABI w
 
 All of this is a software issue (compiler / ABI).
 
+# RISCV userspace
+
+Dual ISA, RV userspace only. Requires PowerISA to be able to context-switch RV registers and CSRs.
+
+the exception entry point:
+https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/powerpc/kernel/exceptions-64s.S?h=v5.4-rc5#n409
+
+the rest of the context switch code is in a different file:
+https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/powerpc/kernel/entry_64.S?h=v5.4-rc5#n589