From: Dmitry Selyutin Date: Wed, 18 Jan 2023 19:58:00 +0000 (+0300) Subject: power_insn: fix paired registers disassembly X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=8f4082be473e66ee24d0e18a7a566235e4c17af2;p=openpower-isa.git power_insn: fix paired registers disassembly --- diff --git a/src/openpower/decoder/power_insn.py b/src/openpower/decoder/power_insn.py index a87a029f..f65fe3ad 100644 --- a/src/openpower/decoder/power_insn.py +++ b/src/openpower/decoder/power_insn.py @@ -1756,7 +1756,14 @@ class WordInstruction(Instruction): yield f"{blob}.long 0x{int(self):08x}" return - if style <= Style.LEGACY and record.ppc.unofficial: + paired = False + if style is Style.LEGACY: + paired = False + for (op_cls, _) in record.dynamic_operands: + if issubclass(op_cls, (GPRPairOperand, FPRPairOperand)): + paired = True + + if style is Style.LEGACY and (paired or record.ppc.unofficial): yield f"{blob}.long 0x{int(self):08x}" else: operands = tuple(map(_operator.itemgetter(1),