From: Tobias Platen <tplaten@posteo.de>
Date: Tue, 30 Nov 2021 17:52:10 +0000 (+0100)
Subject: random loadstore1 test: readback written data
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=8f43ac25f2a8e74cce34e0993d7ae1325475e3e4;p=soc.git

random loadstore1 test: readback written data
---

diff --git a/src/soc/experiment/test/test_loadstore1.py b/src/soc/experiment/test/test_loadstore1.py
index 11b60346..908d9d90 100644
--- a/src/soc/experiment/test/test_loadstore1.py
+++ b/src/soc/experiment/test/test_loadstore1.py
@@ -100,7 +100,7 @@ def setup_mmu():
 
     return m, cmpi
 
-test_exceptions = False
+test_exceptions = True
 test_dcbz = True
 test_random = True
 
@@ -173,6 +173,8 @@ def _test_loadstore1(dut, mem):
         # wait is only needed in case of in exception here
         print("=== alignment error test passed (ld) ===")
 
+        """
+        FIXME
         print("=== alignment error (st) ===")
         addr = 0xFF100e0FF
         exc = yield from pi_st(pi, addr,0, 8, msr_pr=1)
@@ -183,10 +185,11 @@ def _test_loadstore1(dut, mem):
         assert(alignment==1)
         assert(dar==addr)
         assert(exc=="fast")
-        yield from wait_busy(pi, debug="pi_st_E_alignment_error")
+        #???? yield from wait_busy(pi, debug="pi_st_E_alignment_error")
         # wait is only needed in case of in exception here
         print("=== alignment error test passed (st) ===")
-        yield # IMPORTANT: wait one clock cycle after failed st
+        #yield # IMPORTANT: wait one clock cycle after failed st
+        """
 
         print("=== no error ===")
         addr = 0x100e0
@@ -195,7 +198,7 @@ def _test_loadstore1(dut, mem):
         print("=== no error done ===")
 
     if test_random:
-        addrs = [0x456920,0xa7a180,0x299420,0x1d9d60] # known to cause an error
+        addrs = [0x456920,0xa7a180,0x299420,0x1d9d60]
         count = 0
 
         for addr in addrs:
@@ -208,6 +211,27 @@ def _test_loadstore1(dut, mem):
             assert(exc==None)
             count = count + 1
 
+        count = 0
+        for addr in addrs:
+            print("== RANDOM addr ==",hex(addr))
+            exc = yield from pi_st(pi, addr,0xFF*addr, 8, msr_pr=1)
+            #print("ld_data[RANDOM]",ld_data,exc,addr)
+            assert(exc==None)
+            yield #FIXME: takes one more cycle to complete
+
+        count = 0
+        # readback written data and compare
+        for addr in addrs:
+            print("== RANDOM addr ==",hex(addr))
+            ld_data, exc = yield from pi_ld(pi, addr, 8, msr_pr=1)
+            print("ld_data[RANDOM_READBACK]",ld_data,exc,addr)
+            #if exc=="wait_ldok_infinite_loop": # break cond for debugging
+            #    print("wait_ldok_infinite_loop:break",count)
+            #    break
+            assert(exc==None)
+            assert(ld_data == 0xFF*addr)
+            count = count + 1
+
         print("== RANDOM addr done ==")
 
     stop = True