From: Michael Meissner <meissner@gcc.gnu.org>
Date: Fri, 1 Dec 1995 14:32:15 +0000 (+0000)
Subject: Split decrement_and_branch_until_zero until define_expand/define_insn
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=8f61c2cc9307e64f343159d3ad84ecdc80b478a0;p=gcc.git

Split decrement_and_branch_until_zero until define_expand/define_insn

From-SVN: r10660
---

diff --git a/gcc/config/fx80/fx80.md b/gcc/config/fx80/fx80.md
index 641ba9aea80..d12fb58d63d 100644
--- a/gcc/config/fx80/fx80.md
+++ b/gcc/config/fx80/fx80.md
@@ -2337,7 +2337,20 @@
 
 ;; dbra patterns that use REG_NOTES info generated by strength_reduce.
 
-(define_insn "decrement_and_branch_until_zero"
+(define_expand "decrement_and_branch_until_zero"
+  [(parallel [(set (pc)
+		   (if_then_else
+		    (ge (match_operand:SI 0 "general_operand" "")
+			(const_int 1))
+		    (label_ref (match_operand 1 "" ""))
+		    (pc)))
+	      (set (match_dup 0)
+		   (plus:SI (match_dup 0)
+			    (const_int -1)))])]
+  ""
+  "")
+
+(define_insn ""
   [(set (pc)
 	(if_then_else
 	  (ge (match_operand:SI 0 "general_operand" "d,m,g")
diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md
index 9e2a60a40a1..1f243ac0fd5 100644
--- a/gcc/config/m68k/m68k.md
+++ b/gcc/config/m68k/m68k.md
@@ -5782,7 +5782,21 @@
 #endif /* not MOTOROLA */
 }")
 
-(define_insn "decrement_and_branch_until_zero"
+(define_expand "decrement_and_branch_until_zero"
+  [(parallel [(set (pc)
+		   (if_then_else
+		    (ge (plus:SI (match_operand:SI 0 "general_operand" "")
+				 (const_int -1))
+			(const_int 0))
+		    (label_ref (match_operand 1 "" ""))
+		    (pc)))
+	      (set (match_dup 0)
+		   (plus:SI (match_dup 0)
+			    (const_int -1)))])]
+  ""
+  "")
+
+(define_insn ""
   [(set (pc)
 	(if_then_else
 	  (ge (plus:SI (match_operand:SI 0 "general_operand" "+d*am")
diff --git a/gcc/config/m88k/m88k.md b/gcc/config/m88k/m88k.md
index 188e6cc075d..3f6642baab5 100644
--- a/gcc/config/m88k/m88k.md
+++ b/gcc/config/m88k/m88k.md
@@ -3995,7 +3995,23 @@
 ;; reloads, hence the `m' constraints.  The `!' constraints direct reload
 ;; to not choose the register alternatives in the event a reload is needed.
 
-(define_insn "decrement_and_branch_until_zero"
+(define_expand "decrement_and_branch_until_zero"
+  [(parallel [(set (pc)
+		   (if_then_else
+		    (match_operator 0 "relop_no_unsigned"
+				    [(match_operand:SI 1 "register_operand" "")
+				     (const_int 0)])
+		    (label_ref (match_operand 2 "" ""))
+		    (pc)))
+	      (set (match_dup 1)
+		   (plus:SI (match_dup 1)
+			    (match_operand:SI 3 "add_operand" "")))
+	      (clobber (match_scratch:SI 4 ""))
+	      (clobber (match_scratch:SI 5 "=X,X,&r,&r"))])]
+  ""
+  "")
+
+(define_insn ""
   [(set (pc)
 	(if_then_else
 	 (match_operator 0 "relop_no_unsigned"