From: Dave Airlie Date: Mon, 24 Aug 2020 03:52:46 +0000 (+1000) Subject: gallivm/nir: add some f16 support X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=8f6eb35e0972e95127ab8ea984f915f7c3526544;p=mesa.git gallivm/nir: add some f16 support GLSL lowers packhalf2x16 itself, but for SPIRV we don't have that option. For packing when NIR lowers it uses f2f16 and for unpack it needs the casting and f2f32 Fixes: dEQP-VK.glsl.builtin.function.pack_unpack.packhalf2x16* dEQP-VK.glsl.builtin.function.pack_unpack.unpackhalf2x16* Reviewed-by: Roland Scheidegger Part-of: --- diff --git a/src/gallium/auxiliary/gallivm/lp_bld_nir.c b/src/gallium/auxiliary/gallivm/lp_bld_nir.c index 9a60452479b..c008e22c67d 100644 --- a/src/gallium/auxiliary/gallivm/lp_bld_nir.c +++ b/src/gallium/auxiliary/gallivm/lp_bld_nir.c @@ -46,6 +46,8 @@ static LLVMValueRef cast_type(struct lp_build_nir_context *bld_base, LLVMValueRe switch (alu_type) { case nir_type_float: switch (bit_size) { + case 16: + return LLVMBuildBitCast(builder, val, LLVMVectorType(LLVMHalfTypeInContext(bld_base->base.gallivm->context), bld_base->base.type.length), ""); case 32: return LLVMBuildBitCast(builder, val, bld_base->base.vec_type, ""); case 64: @@ -489,9 +491,17 @@ static LLVMValueRef do_alu_action(struct lp_build_nir_context *bld_base, case nir_op_f2b32: result = flt_to_bool32(bld_base, src_bit_size[0], src[0]); break; - case nir_op_f2f32: + case nir_op_f2f16: result = LLVMBuildFPTrunc(builder, src[0], - bld_base->base.vec_type, ""); + LLVMVectorType(LLVMHalfTypeInContext(gallivm->context), bld_base->base.type.length), ""); + break; + case nir_op_f2f32: + if (src_bit_size[0] < 32) + result = LLVMBuildFPExt(builder, src[0], + bld_base->base.vec_type, ""); + else + result = LLVMBuildFPTrunc(builder, src[0], + bld_base->base.vec_type, ""); break; case nir_op_f2f64: result = LLVMBuildFPExt(builder, src[0],