From: lkcl <lkcl@web>
Date: Mon, 25 May 2020 21:48:35 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: convert-csv-opcode-to-binary~2566
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=90432959061a92700147122b86e27d8706a7a594;p=libreriscv.git

---

diff --git a/3d_gpu/architecture/compunit.mdwn b/3d_gpu/architecture/compunit.mdwn
index 187b826aa..32cf65bc9 100644
--- a/3d_gpu/architecture/compunit.mdwn
+++ b/3d_gpu/architecture/compunit.mdwn
@@ -34,8 +34,10 @@ Graph of Register hazards.
 Signals activate as follows:
 
 * When issue is first raised, a busy signal is sent out.
-  The src1 and src2 registers and the operand can be latched in
-  at this point
+  The operand can be latched in at this point.
+
+* Issue will only be raised for one cycle.  Read requests may
+  go out immediately after issue goes low.
 
 * Read request is set, which is acknowledged through the Scoreboard
   to the priority picker, which generates (one and only one) Go_Read