From: Evandro Menezes Date: Fri, 1 Apr 2016 19:55:52 +0000 (+0000) Subject: [AArch64] Fix SIMD predicate X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=907e22e847dadcf7e8fcb1f77adfc1b76dfec01c;p=gcc.git [AArch64] Fix SIMD predicate Fix the predicate "aarch64_simd_reg_or_zero" to correctly validate the "Y" constraint (scalar FP 0.0 immediate). * gcc/config/aarch64/predicates.md (aarch64_simd_reg_or_zero): Add the "const_double" to the list of operand constraints. From-SVN: r234685 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 81d88797472..0d32ed68ef2 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2016-03-31 Evandro Menezes + + Fix the predicate "aarch64_simd_reg_or_zero" to correctly validate + the "Y" constraint (scalar FP 0.0 immediate). + + * gcc/config/aarch64/predicates.md (aarch64_simd_reg_or_zero): + Add the "const_double" to the list of operand constraints. + 2016-04-01 Jakub Jelinek PR rtl-optimization/70467 diff --git a/gcc/config/aarch64/predicates.md b/gcc/config/aarch64/predicates.md index 11868278c3d..8f2726d4483 100644 --- a/gcc/config/aarch64/predicates.md +++ b/gcc/config/aarch64/predicates.md @@ -302,7 +302,7 @@ }) (define_predicate "aarch64_simd_reg_or_zero" - (and (match_code "reg,subreg,const_int,const_vector") + (and (match_code "reg,subreg,const_int,const_double,const_vector") (ior (match_operand 0 "register_operand") (ior (match_test "op == const0_rtx") (match_test "aarch64_simd_imm_zero_p (op, mode)")))))