From: Jiong Wang <jiong.wang@arm.com>
Date: Wed, 29 Apr 2015 10:04:17 +0000 (+0100)
Subject: [ARM] Update ld testcases
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=9081b64dc1b85a63466962adbc92d1c3e560a659;p=binutils-gdb.git

[ARM] Update ld testcases

2015-04-29  Renlin Li  <renlin.li@arm.com>
ld/testsuite/
  * ld-arm/ifunc-10.dd: Adjust expected output.
  * ld-arm/ifunc-2.dd: Likewise.
---

diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog
index a6704f81965..5ea84321498 100644
--- a/ld/testsuite/ChangeLog
+++ b/ld/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2015-04-27  Renlin Li  <renlin.li@arm.com>
+
+	* ld-arm/ifunc-10.dd: Adjust expected output.
+	* ld-arm/ifunc-2.dd: Likewise.
+
 2015-04-27  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
 
 	* ld-s390/gotreloc_31-1.dd: Use instruction mnemonics.
diff --git a/ld/testsuite/ld-arm/ifunc-10.dd b/ld/testsuite/ld-arm/ifunc-10.dd
index 88bae50a66b..d96c086aefc 100644
--- a/ld/testsuite/ld-arm/ifunc-10.dd
+++ b/ld/testsuite/ld-arm/ifunc-10.dd
@@ -267,7 +267,7 @@ Disassembly of section \.text:
 
 0000a010 <tbf1>:
     a010:	46f7      	mov	pc, lr
-    a012:	0000      	movs	r0, r0
+    a012:	0000      	.short	0x0000
     a014:	e1a0f00e 	mov	pc, lr
     a018:	e1a0f00e 	mov	pc, lr
     a01c:	e1a0f00e 	mov	pc, lr
diff --git a/ld/testsuite/ld-arm/ifunc-2.dd b/ld/testsuite/ld-arm/ifunc-2.dd
index f6d57faef96..91eab540d29 100644
--- a/ld/testsuite/ld-arm/ifunc-2.dd
+++ b/ld/testsuite/ld-arm/ifunc-2.dd
@@ -84,10 +84,10 @@ Disassembly of section \.text:
 
 0000a00c <f4>:
     a00c:	46f7      	mov	pc, lr
-    a00e:	0000      	movs	r0, r0
+    a00e:	0000      	.short	0x0000
     a010:	e1a0f00e 	mov	pc, lr
     a014:	46f7      	mov	pc, lr
-    a016:	0000      	movs	r0, r0
+    a016:	0000      	.short	0x0000
     a018:	e1a0f00e 	mov	pc, lr
     a01c:	46f7      	mov	pc, lr
 	\.\.\.