From: Konstantinos Margaritis Date: Fri, 28 Apr 2023 09:16:56 +0000 (+0000) Subject: Convert to 4-operands, RT=RA, SH->4-bits, BF->DCTI X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=9094d03d96dc474267c587fc94b8b5fdc8244227;p=libreriscv.git Convert to 4-operands, RT=RA, SH->4-bits, BF->DCTI --- diff --git a/openpower/sv/twin_butterfly.mdwn b/openpower/sv/twin_butterfly.mdwn index 4670d77dc..21cb5f251 100644 --- a/openpower/sv/twin_butterfly.mdwn +++ b/openpower/sv/twin_butterfly.mdwn @@ -34,21 +34,21 @@ The instruction will run in accumulate mode, so in order to calculate the 2-coef # [DRAFT] Integer Butterfly Multiply Add/Sub FFT/DCT -BF-Form +DCTI-Form -* maddsubrs RT,RA,RB,RC,SH +* maddsubrs RT,RA,RB,SH Pseudo-code: ``` - sum <- (RA) + (RB) - diff <- (RA) - (RB) - prod1 <- MUL(RC, sum) # TODO: pick hi-half - prod2 <- MUL(RC, diff) # TODO: pick hi-half - res1 <- ROTL64(prod1, SH) # TODO shift the other way (63-SH?) - res2 <- ROTL64(prod2, SH) - RT <- res1 - RS <- res2 + sum <- (RT) + (RA) # RT = a, RA = b + diff <- (RT) - (RA) + prod1 <- MUL(RB, sum) # RB = c + prod2 <- MUL(RB, diff) # TODO: Pick high half? + res1 <- ROTL64(prod1, XLEN-SH) + res2 <- ROTL64(prod2, XLEN-SH) + RT <- (RT) + res1 + RS <- (RS) + res2 ``` Special Registers Altered: @@ -57,18 +57,18 @@ Special Registers Altered: None ``` -Where BF-Form is defined in fields.txt: +Where DCTI-Form is defined in fields.txt: ``` -# 1.6.39 BF-FORM - |0 | 6 |11 |16 |21 | 26 |27 31| - | PO | RT | RA | RB | RC | SH | XO | +# 1.6.7.2 DCTI-FORM + |0 | 6 |11 |16 |21 |25 |31 | + | PO | RT | RA | RB | SH | XO | Rc | ``` The instruction has been added to `minor_22.csv`: ``` -------01000,ALU,OP_MADDSUBRS,RA,RB,RC,RT,NONE,CR0,0,0,ZERO,0,NONE,0,0,0,0,1,0,RC_ONLY,0,0,maddsubrs,BF,,1,unofficial until submitted and approved/renumbered by the opf isa wg +------01000,ALU,OP_MADDSUBRS,RT,CONST_UI,RB,RT,NONE,CR0,0,0,ZERO,0,NONE,0,0,0,0,1,0,RC_ONLY,0,0,maddsubrs,DCTI,,1,unofficial until submitted and approved/renumbered by the opf isa wg ```