From: Eddie Hung <eddie@fpgeh.com>
Date: Wed, 20 Nov 2019 00:57:58 +0000 (-0800)
Subject: Add two tests
X-Git-Tag: working-ls180~881^2^2~160^2~1
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=90c5ca330c5e6c8eb45ad0b755b0049a34dc7534;p=yosys.git

Add two tests
---

diff --git a/tests/simple_abc9/abc9.v b/tests/simple_abc9/abc9.v
index 64b625efe..58596d701 100644
--- a/tests/simple_abc9/abc9.v
+++ b/tests/simple_abc9/abc9.v
@@ -267,3 +267,15 @@ module abc9_test026(output [3:0] o, p);
 assign o = { 1'b1, 1'bx };
 assign p = { 1'b1, 1'bx, 1'b0 };
 endmodule
+
+module abc9_test029(input clk, d, r, output reg q);
+always @(posedge clk or posedge r)
+    if (r) q <= 1'b0;
+    else q <= d;
+endmodule
+
+module abc9_test030(input clk, d, r, output reg q);
+always @(negedge clk or posedge r)
+    if (r) q <= 1'b1;
+    else q <= d;
+endmodule