From: Bill Schmidt Date: Thu, 23 May 2019 18:24:22 +0000 (+0000) Subject: rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Add OPTION_MASK_PCREL. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=9111760356ce908060b66b11d00ac0ee870e9276;p=gcc.git rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Add OPTION_MASK_PCREL. 2019-05-22 Bill Schmidt Michael Meissner Segher Boessenkool * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Add OPTION_MASK_PCREL. (POWERPC_MASKS): Add OPTION_MASK_PCREL. * config/rs6000/rs6000-protos.h (rs6000_pcrel_p): New prototype. (rs6000_fndecl_pcrel_p): Likewise. * config/rs6000/rs6000.c (rs6000_option_override_internal): Report error if -mpcrel is requested without -mcpu=future. (rs6000_opt_masks): Add entry for pcrel. (rs6000_fndecl_pcrel_p): New function. (rs6000_pcrel_p): Likewise. * config/rs6000/rs6000.opt (mpcrel): New option. * doc/invoke.texi: Document -mpcrel and -mno-pcrel. Co-Authored-By: Michael Meissner Co-Authored-By: Segher Boessenkool From-SVN: r271575 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index ff91bfe77fa..3f183fb1427 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,20 @@ +2019-05-23 Bill Schmidt + Michael Meissner + Segher Boessenkool + + * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Add + OPTION_MASK_PCREL. + (POWERPC_MASKS): Add OPTION_MASK_PCREL. + * config/rs6000/rs6000-protos.h (rs6000_pcrel_p): New prototype. + (rs6000_fndecl_pcrel_p): Likewise. + * config/rs6000/rs6000.c (rs6000_option_override_internal): Report + error if -mpcrel is requested without -mcpu=future. + (rs6000_opt_masks): Add entry for pcrel. + (rs6000_fndecl_pcrel_p): New function. + (rs6000_pcrel_p): Likewise. + * config/rs6000/rs6000.opt (mpcrel): New option. + * doc/invoke.texi: Document -mpcrel and -mno-pcrel. + 2019-05-23 Jan Hubicka Martin Liska diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def index 6220f2bdd59..64292c923e6 100644 --- a/gcc/config/rs6000/rs6000-cpus.def +++ b/gcc/config/rs6000/rs6000-cpus.def @@ -74,7 +74,8 @@ /* Support for a future processor's features. */ #define ISA_FUTURE_MASKS_SERVER (ISA_3_0_MASKS_SERVER \ - | OPTION_MASK_FUTURE) + | OPTION_MASK_FUTURE \ + | OPTION_MASK_PCREL) /* Flags that need to be turned off if -mno-power9-vector. */ #define OTHER_P9_VECTOR_MASKS (OPTION_MASK_FLOAT128_HW \ @@ -129,6 +130,7 @@ | OPTION_MASK_P9_MINMAX \ | OPTION_MASK_P9_MISC \ | OPTION_MASK_P9_VECTOR \ + | OPTION_MASK_PCREL \ | OPTION_MASK_POPCNTB \ | OPTION_MASK_POPCNTD \ | OPTION_MASK_POWERPC64 \ diff --git a/gcc/config/rs6000/rs6000-protos.h b/gcc/config/rs6000/rs6000-protos.h index 9718adaa2b9..18ece005a96 100644 --- a/gcc/config/rs6000/rs6000-protos.h +++ b/gcc/config/rs6000/rs6000-protos.h @@ -152,6 +152,8 @@ extern rtx rs6000_machopic_legitimize_pic_address (rtx, machine_mode, extern rtx rs6000_allocate_stack_temp (machine_mode, bool, bool); extern align_flags rs6000_loop_align (rtx); extern void rs6000_split_logical (rtx [], enum rtx_code, bool, bool, bool); +extern bool rs6000_pcrel_p (struct function *); +extern bool rs6000_fndecl_pcrel_p (const_tree); #endif /* RTX_CODE */ #ifdef TREE_CODE diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 8ad59ecb481..7a2e43fd72a 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -4296,6 +4296,15 @@ rs6000_option_override_internal (bool global_init_p) rs6000_isa_flags &= ~OPTION_MASK_FLOAT128_HW; } + /* -mpcrel requires the prefixed load/store support on FUTURE systems. */ + if (!TARGET_FUTURE && TARGET_PCREL) + { + if ((rs6000_isa_flags_explicit & OPTION_MASK_PCREL) != 0) + error ("%qs requires %qs", "-mpcrel", "-mcpu=future"); + + rs6000_isa_flags &= ~OPTION_MASK_PCREL; + } + /* Print the options after updating the defaults. */ if (TARGET_DEBUG_REG || TARGET_DEBUG_TARGET) rs6000_print_isa_options (stderr, 0, "after defaults", rs6000_isa_flags); @@ -36274,6 +36283,7 @@ static struct rs6000_opt_mask const rs6000_opt_masks[] = { "modulo", OPTION_MASK_MODULO, false, true }, { "mulhw", OPTION_MASK_MULHW, false, true }, { "multiple", OPTION_MASK_MULTIPLE, false, true }, + { "pcrel", OPTION_MASK_PCREL, false, true }, { "popcntb", OPTION_MASK_POPCNTB, false, true }, { "popcntd", OPTION_MASK_POPCNTD, false, true }, { "power8-fusion", OPTION_MASK_P8_FUSION, false, true }, @@ -38113,6 +38123,34 @@ rs6000_save_toc_in_prologue_p (void) return (cfun && cfun->machine && cfun->machine->save_toc_in_prologue); } +/* Return whether we should generate PC-relative code for FNDECL. */ +bool +rs6000_fndecl_pcrel_p (const_tree fndecl) +{ + if (DEFAULT_ABI != ABI_ELFv2) + return false; + + struct cl_target_option *opts = target_opts_for_fn (fndecl); + + return ((opts->x_rs6000_isa_flags & OPTION_MASK_PCREL) != 0 + && TARGET_CMODEL == CMODEL_MEDIUM); +} + +/* Return whether we should generate PC-relative code for *FN. */ +bool +rs6000_pcrel_p (struct function *fn) +{ + if (DEFAULT_ABI != ABI_ELFv2) + return false; + + /* Optimize usual case. */ + if (fn == cfun) + return ((rs6000_isa_flags & OPTION_MASK_PCREL) != 0 + && TARGET_CMODEL == CMODEL_MEDIUM); + + return rs6000_fndecl_pcrel_p (fn->decl); +} + #ifdef HAVE_GAS_HIDDEN # define USE_HIDDEN_LINKONCE 1 #else diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt index 196e75d7009..43b04834746 100644 --- a/gcc/config/rs6000/rs6000.opt +++ b/gcc/config/rs6000/rs6000.opt @@ -573,3 +573,7 @@ Target Undocumented Var(rs6000_speculate_indirect_jumps) Init(1) Save mfuture Target Report Mask(FUTURE) Var(rs6000_isa_flags) Use instructions for a future architecture. + +mpcrel +Target Report Mask(PCREL) Var(rs6000_isa_flags) +Generate (do not generate) pc-relative memory addressing. diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 61645044504..4964cc41ba3 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -1121,7 +1121,7 @@ See RS/6000 and PowerPC Options. -mfloat128 -mno-float128 -mfloat128-hardware -mno-float128-hardware @gol -mgnu-attribute -mno-gnu-attribute @gol -mstack-protector-guard=@var{guard} -mstack-protector-guard-reg=@var{reg} @gol --mstack-protector-guard-offset=@var{offset}} +-mstack-protector-guard-offset=@var{offset} -mpcrel -mno-pcrel} @emph{RX Options} @gccoptlist{-m64bit-doubles -m32bit-doubles -fpu -nofpu@gol @@ -25095,6 +25095,13 @@ which register to use as base register for reading the canary, and from what offset from that base register. The default for those is as specified in the relevant ABI. @option{-mstack-protector-guard-symbol=@var{symbol}} overrides the offset with a symbol reference to a canary in the TLS block. + +@item -mpcrel +@itemx -mno-pcrel +@opindex mpcrel +@opindex mno-pcrel +Generate (do not generate) pc-relative addressing when the option +@option{-mcpu=future} is used. @end table @node RX Options