From: Clifford Wolf <clifford@clifford.at>
Date: Fri, 24 Jul 2015 12:12:50 +0000 (+0200)
Subject: Improved $adff simplification
X-Git-Tag: yosys-0.6~223
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=914ae3401eb9c05564391b5f0d3b6fc069f7cbc0;p=yosys.git

Improved $adff simplification
---

diff --git a/passes/opt/opt_rmdff.cc b/passes/opt/opt_rmdff.cc
index d2695b167..24c2d3fa3 100644
--- a/passes/opt/opt_rmdff.cc
+++ b/passes/opt/opt_rmdff.cc
@@ -147,7 +147,7 @@ bool handle_dff(RTLIL::Module *mod, RTLIL::Cell *dff)
 		goto delete_dff;
 	}
 
-	if (sig_d.is_fully_const() && !sig_r.size() && (!has_init || val_init == sig_d.as_const())) {
+	if (sig_d.is_fully_const() && (!sig_r.size() || val_rv == sig_d.as_const()) && (!has_init || val_init == sig_d.as_const())) {
 		RTLIL::SigSig conn(sig_q, sig_d);
 		mod->connect(conn);
 		goto delete_dff;