From: Jacob Lifshay <programmerjake@gmail.com>
Date: Wed, 11 Oct 2023 05:05:49 +0000 (-0700)
Subject: support ignoring integer registers for ExpectedState
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=915ca5d3f5bd45607e947c98b0068c36e7f56a12;p=openpower-isa.git

support ignoring integer registers for ExpectedState
---

diff --git a/src/openpower/test/state.py b/src/openpower/test/state.py
index d32f4b3e..50a01520 100644
--- a/src/openpower/test/state.py
+++ b/src/openpower/test/state.py
@@ -170,6 +170,8 @@ class State:
         # Compare int registers
         for i, (intreg, intreg2) in enumerate(
                 zip(self.intregs, s2.intregs)):
+            if intreg is None or intreg2 is None:
+                continue
             log("asserting...reg", i, intreg, intreg2)
             log("code, frepr(code)", self.code, repr(self.code))
             self.dut.assertEqual(intreg, intreg2,