From: lkcl <lkcl@web>
Date: Sat, 2 Apr 2022 12:36:23 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~2925
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=91c94ca1ca06db22a8adee7984420d6b92dae00a;p=libreriscv.git

---

diff --git a/openpower/sv/svp64/appendix.mdwn b/openpower/sv/svp64/appendix.mdwn
index fca8502d4..8b69188b9 100644
--- a/openpower/sv/svp64/appendix.mdwn
+++ b/openpower/sv/svp64/appendix.mdwn
@@ -459,7 +459,7 @@ SV is applied.
 
 Numbering relationships for CR fields are already complex due to being
 in BE format (*the relationship is not clearly explained in the v3.0B
-or v3.1B specification*).  However with some care and consideration
+or v3.1 specification*).  However with some care and consideration
 the exact same mapping used for INT and FP regfiles may be applied,
 just to the upper bits, as explained below.  The notation
 `CR{field number}` is used to indicate access to a particular
@@ -467,6 +467,14 @@ Condition Register Field (as opposed to the notation `CR[bit]`
 which accesses one bit of the 32 bit Power ISA v3.0B
 Condition Register)
 
+`CR{n}` refers to `CR0` when `n=0` and consequently, for CR0-7, is defined, in v3.0B pseudocode, as:
+
+     CR{7-n} = CR[32+n*4:35+n*4]
+
+For SVP64 the relationship for the sequential
+numbering of elements is to the CR **fields** within
+the CR Register, not to individual bits within the CR register.
+
 In OpenPOWER v3.0/1, BF/BT/BA/BB are all 5 bits.  The top 3 bits (0:2)
 select one of the 8 CRs; the bottom 2 bits (3:4) select one of 4 bits
 *in* that CR.  The numbering was determined (after 4 months of