From: Florent Kermarrec <florent@enjoy-digital.fr>
Date: Tue, 18 Aug 2015 23:09:54 +0000 (+0200)
Subject: mibuild/xilinx/ise: update synthesis with yosis
X-Git-Tag: 24jan2021_ls180~2099^2~25
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=9210df9e9fe5f361e9eb1b12f1d4dd15b26e7ef8;p=litex.git

mibuild/xilinx/ise: update synthesis with yosis
---

diff --git a/mibuild/xilinx/ise.py b/mibuild/xilinx/ise.py
index d440839e..92f37517 100644
--- a/mibuild/xilinx/ise.py
+++ b/mibuild/xilinx/ise.py
@@ -69,24 +69,12 @@ def _run_yosys(device, sources, vincpaths, build_name):
     incflags = ""
     for path in vincpaths:
         incflags += " -I" + path
-    for filename, language in sources:
+    for filename, language, library in sources:
         ys_contents += "read_{}{} {}\n".format(language, incflags, filename)
 
-    if device[:2] == "xc":
-        archcode = device[2:4]
-    else:
-        archcode = device[0:2]
-    arch = {
-        "6s": "spartan6",
-        "7a": "artix7",
-        "7k": "kintex7",
-        "7v": "virtex7",
-        "7z": "zynq7000"
-    }[archcode]
-
     ys_contents += """hierarchy -check -top top
 proc; memory; opt; fsm; opt
-synth_xilinx -arch {arch} -top top -edif {build_name}.edif""".format(arch=arch, build_name=build_name)
+synth_xilinx -top top -edif {build_name}.edif""".format(build_name=build_name)
 
     ys_name = build_name + ".ys"
     tools.write_to_file(ys_name, ys_contents)