From: Luke Kenneth Casson Leighton Date: Thu, 2 Aug 2018 06:21:42 +0000 (+0100) Subject: add osdr_clock, remove unneeded SDIO ctrl / config, to be done by hand X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=921380942b9615baa3d296784b7d22b8b0d35419;p=shakti-peripherals.git add osdr_clock, remove unneeded SDIO ctrl / config, to be done by hand --- diff --git a/src/peripherals/sdram/sdr_top.bsv b/src/peripherals/sdram/sdr_top.bsv index 181f6de..1ab55e4 100644 --- a/src/peripherals/sdram/sdr_top.bsv +++ b/src/peripherals/sdram/sdr_top.bsv @@ -31,7 +31,6 @@ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND `define SDR_INIT_DONE 8'h58 `define SDR_WIDTH 8'h60 `define SDR_COLBITS 8'h68 -`define SDR_SDIO_CTRL 8'h70 `define SDR_CLK_DELAY 8'h78 `define verbose @@ -61,6 +60,7 @@ interface Ifc_sdram_out; interface Get#(Bit#(8)) osdr_dqm; interface Get#(Bit#(2)) osdr_ba; interface Get#(Bit#(13)) osdr_addr; + interface Get#(Bit#(1)) osdr_clock; endinterface @@ -68,8 +68,6 @@ interface Ifc_sdr_slave; interface AXI4_Slave_IFC#(`PADDR, `Reg_width,`USERSPACE) axi4_slave_sdram; interface AXI4_Slave_IFC#(`PADDR, `Reg_width,`USERSPACE) axi4_slave_cntrl_reg; interface Ifc_sdram_out ifc_sdram_out; - method Bit#(9) sdram_sdio_ctrl; - interface Clock sdram_clk; endinterface typedef enum{ @@ -266,7 +264,6 @@ module mksdr_axi4_slave#(Clock clk0) (Ifc_sdr_slave); Reg#(Bit#(4)) rg_cfg_sdr_twr_d <- mkConfigReg(4'h1,clocked_by clk0, reset_by rst0); Reg#(Bit#(2)) rg_cfg_sdr_width <- mkConfigReg(2'b0,clocked_by clk0, reset_by rst0); Reg#(Bit#(2)) rg_cfg_colbits <- mkConfigReg(2'b01,clocked_by clk0, reset_by rst0); - Reg#(Bit#(9)) rg_cfg_sdio_ctrl <- mkConfigReg(9'b000100011,clocked_by clk0, reset_by rst0); Reg#(Bit#(8)) rg_cfg_sdr_clk_delay <- mkConfigReg(8'b00001000,clocked_by clk0, reset_by rst0); Reg#(Bit#(`SDR_RFSH_TIMER_W )) rg_cfg_sdr_rfsh <- mkConfigReg(12'h100,clocked_by clk0, reset_by rst0); @@ -373,7 +370,6 @@ module mksdr_axi4_slave#(Clock clk0) (Ifc_sdr_slave); `SDR_COLBITS : rg_cfg_colbits <= data [1:0]; - `SDR_SDIO_CTRL : rg_cfg_sdio_ctrl <= data [8:0]; `SDR_CLK_DELAY : rg_cfg_sdr_clk_delay <= data [7:0]; @@ -414,7 +410,6 @@ module mksdr_axi4_slave#(Clock clk0) (Ifc_sdr_slave); `SDR_COLBITS : return extend(rg_cfg_colbits); - `SDR_SDIO_CTRL : return extend(rg_cfg_sdio_ctrl); `SDR_CLK_DELAY : return extend(rg_cfg_sdr_clk_delay); @@ -830,13 +825,13 @@ module mksdr_axi4_slave#(Clock clk0) (Ifc_sdr_slave); endmethod endinterface; + interface osdr_clock = interface Get + method ActionValue#(Bit#(1)) get; + return ?; + endmethod + endinterface; endinterface - interface sdram_clk = clk0; - method Bit#(9) sdram_sdio_ctrl(); - return rg_cfg_sdio_ctrl; - endmethod - interface axi4_slave_sdram = s_xactor_sdram.axi_side; interface axi4_slave_cntrl_reg = s_xactor_cntrl_reg.axi_side;