From: Sebastien Bourdeauducq <sebastien@milkymist.org>
Date: Mon, 12 Dec 2011 23:25:25 +0000 (+0100)
Subject: wishbone: only send ack to the active master in arbiter
X-Git-Tag: 24jan2021_ls180~2099^2~1141
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=923fc52e6825ac1e4f79bac3609e4b225d029b2f;p=litex.git

wishbone: only send ack to the active master in arbiter
---

diff --git a/migen/bus/wishbone.py b/migen/bus/wishbone.py
index ee579fb1..bca7fce4 100644
--- a/migen/bus/wishbone.py
+++ b/migen/bus/wishbone.py
@@ -44,9 +44,14 @@ class Arbiter:
 		s2m_names = [GetSigName(x, False) for x in _desc if not x[0]]
 		for name in s2m_names:
 			source = getattr(self.target, name)
+			i = 0
 			for m in self.masters:
 				dest = getattr(m, name)
-				comb.append(f.Assign(dest, source))
+				if name == "ack_i" or name == "err_i":
+					comb.append(f.Assign(dest, source & (self.rr.grant == f.Constant(i, self.rr.grant.bv))))
+				else:
+					comb.append(f.Assign(dest, source))
+				i += 1
 		
 		# connect bus requests to round-robin selector
 		reqs = [m.cyc_o for m in self.masters]
@@ -54,7 +59,6 @@ class Arbiter:
 		
 		return f.Fragment(comb) + self.rr.GetFragment()
 
-
 class Decoder:
 	# slaves is a list of pairs:
 	# 0) structure.Constant defining address (always decoded on the upper bits)