From: Eddie Hung <eddieh@ece.ubc.ca>
Date: Sun, 17 Feb 2019 20:07:14 +0000 (-0800)
Subject: read_aiger to ignore line after ands for ascii, not binary
X-Git-Tag: yosys-0.9~232^2~8
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=9268a271fb8b22b089927d63f0b36d620e19704c;p=yosys.git

read_aiger to ignore line after ands for ascii, not binary
---

diff --git a/frontends/aiger/aigerparse.cc b/frontends/aiger/aigerparse.cc
index 7df28fe87..a1a0a08a0 100644
--- a/frontends/aiger/aigerparse.cc
+++ b/frontends/aiger/aigerparse.cc
@@ -235,6 +235,7 @@ void AigerReader::parse_aiger_ascii()
         RTLIL::Wire *i2_wire = createWireIfNotExists(module, l3);
         module->addAndGate(NEW_ID, i1_wire, i2_wire, o_wire);
     }
+    std::getline(f, line); // Ignore up to start of next line
 }
 
 static unsigned parse_next_delta_literal(std::istream &f, unsigned ref)
@@ -342,8 +343,6 @@ void AigerReader::parse_aiger_binary()
         and_cell->setPort("\\B", i2_wire);
         and_cell->setPort("\\Y", o_wire);
     }
-    std::getline(f, line); // Ignore up to start of next line
-
 }
 
 struct AigerFrontend : public Frontend {