From: David Shah <dave@ds0.me>
Date: Fri, 26 Jul 2019 12:35:39 +0000 (+0100)
Subject: verilog_lexer: Increase YY_BUF_SIZE to 65536
X-Git-Tag: working-ls180~1178^2
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=92694ea3a997cc6d081b6896c213d308adb466d5;p=yosys.git

verilog_lexer: Increase YY_BUF_SIZE to 65536

Signed-off-by: David Shah <dave@ds0.me>
---

diff --git a/frontends/verilog/verilog_lexer.l b/frontends/verilog/verilog_lexer.l
index 951d9c66f..57e55b1f4 100644
--- a/frontends/verilog/verilog_lexer.l
+++ b/frontends/verilog/verilog_lexer.l
@@ -70,6 +70,9 @@ YOSYS_NAMESPACE_END
 #define YY_INPUT(buf,result,max_size) \
 	result = readsome(*VERILOG_FRONTEND::lexin, buf, max_size)
 
+#undef YY_BUF_SIZE
+#define YY_BUF_SIZE 65536
+
 %}
 
 %option yylineno