From: lkcl Date: Thu, 5 May 2022 20:04:48 +0000 (+0100) Subject: (no commit message) X-Git-Tag: opf_rfc_ls005_v1~2420 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=92735709357c9c5f848a7103e033fce720810db3;p=libreriscv.git --- diff --git a/openpower/sv/SimpleV_rationale.mdwn b/openpower/sv/SimpleV_rationale.mdwn index 4708e73e5..f6f717b71 100644 --- a/openpower/sv/SimpleV_rationale.mdwn +++ b/openpower/sv/SimpleV_rationale.mdwn @@ -276,3 +276,18 @@ of the problem-space: DCT, FFT, Parallel Prefix-Sum and other common transformations that require significant programming effort in other ISAs. +**What is missing from Power Scalar ISA that a Vector ISA needs?** + +Remarkably, very little. + +* The traditional `iota` instruction may be + synthesised with an overlapping add, that stacks up incrementally + and sequentially. Although it requires two instructions, one to + start the sum-chain, the technique has the advantage of allowing + increments by arbitrary amounts, and is not limited to addition, + either. +* Big-integer addition (arbitrary-precision arithmetic) is an + emergent characteristic the carry-in, carry-out capability of + Power ISA `adde` instruction. `sv.adde` naturally emerges from the + sequential chaining of these scalar instructions. +*