From: Luke Kenneth Casson Leighton Date: Sat, 21 Jul 2018 05:14:33 +0000 (+0100) Subject: add qspi auto-gen X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=928446d01a5b546500e30faa3012e2c268bfe73f;p=pinmux.git add qspi auto-gen --- diff --git a/src/bsv/peripheral_gen.py b/src/bsv/peripheral_gen.py index b2352bd..a4cadb6 100644 --- a/src/bsv/peripheral_gen.py +++ b/src/bsv/peripheral_gen.py @@ -69,7 +69,8 @@ class PBase(object): if p.get('outen'): fname = self.pinname_outen(pname) if fname: - fname = "{0}{1}.{2}".format(n, count, fname) + if isinstance(fname, str): + fname = "{0}{1}.{2}".format(n, count, fname) fname = self.pinname_tweak(pname, 'outen', fname) ret.append(" {0}_outen({1});".format(ps, fname)) ret.append(" endrule") @@ -243,6 +244,46 @@ class qspi(PBase): def _mk_connection(self, name=None, count=0): return "qspi{0}.slave" + def pinname_out(self, pname): + return {'ck': 'out.clk_o', + 'nss': 'out.ncs_o', + 'io0': 'out.io_o[0]', + 'io1': 'out.io_o[1]', + 'io2': 'out.io_o[2]', + 'io3': 'out.io_o[3]', + }.get(pname, '') + + def pinname_outen(self, pname): + return {'ck': 1, + 'nss': 1, + 'io0': 'out.io_enable[0]', + 'io1': 'out.io_enable[1]', + 'io2': 'out.io_enable[2]', + 'io3': 'out.io_enable[3]', + }.get(pname, '') + + def mk_pincon(self, name, count): + ret = [PBase.mk_pincon(self, name, count)] + # special-case for gpio in, store in a temporary vector + plen = len(self.peripheral.pinspecs) + ret.append(" // XXX NSS and CLK are hard-coded master") + ret.append(" // TODO: must add qspi slave-mode") + ret.append(" rule con_%s%d_io_in" % (name, count)) + ret.append(" {0}{1}.out.io_i(".format(name, count)) + for p in self.peripheral.pinspecs: + typ = p['type'] + pname = p['name'] + if not pname.startswith('io'): + continue + idx = pname[1:] + n = name + sname = self.peripheral.pname(pname).format(count) + ps = "pinmux.peripheral_side.%s_in" % sname + ret.append(" {0},".format(ps)) + ret.append(" });") + ret.append(" endrule") + return '\n'.join(ret) + class pwm(PBase):