From: lkcl <lkcl@web>
Date: Sat, 4 Jun 2022 18:20:03 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~1973
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=92abc6eaba33a0f5451f82fcf29ca7f7d458b195;p=libreriscv.git

---

diff --git a/openpower/sv/remap.mdwn b/openpower/sv/remap.mdwn
index 00d55281f..cdb02640a 100644
--- a/openpower/sv/remap.mdwn
+++ b/openpower/sv/remap.mdwn
@@ -198,7 +198,7 @@ pipeline overlaps.  Out-of-order / Superscalar micro-architectures with
 register-renaming will have an easier time dealing with this than
 DSP-style SIMD micro-architectures.
 
-## svshape instruction
+# svshape instruction
 
 `svshape` is a convenience instruction that reduces instruction
 count for common usage patterns, particularly Matrix, DCT and FFT. It sets up
@@ -218,12 +218,13 @@ Fields:
 
 * **SVxd** - SV REMAP "xdim"
 * **SVyd** - SV REMAP "ydim"
+* **SVzd** - SV REMAP "zdim"
 * **SVRM** - SV REMAP Mode (0b00000 for Matrix, 0b00001 for FFT etc.)
 * **vf** - sets "Vertical-First" mode
 * **XO** - standard 5-bit XO field
 
-| SVRM | Remap Mode description |
-| -- | -- |
+| SVRM   | Remap Mode description |
+| --     | --              |
 | 0b0000 | Matrix 1/2/3D    |
 | 0b0001 | FFT Butterfly   |
 | 0b0010 | DCT Inner butterfly, pre-calculated coefficients |