From: Jan Hubicka Date: Mon, 9 Apr 2001 14:22:37 +0000 (+0200) Subject: i386.c (expand_fp_movcc): Fix condition reversal code. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=92d0fb09386debda7597d86c80c4d8044c5362e2;p=gcc.git i386.c (expand_fp_movcc): Fix condition reversal code. * i386.c (expand_fp_movcc): Fix condition reversal code. * i386.c (ix86_register_move_cost): Fix handling of reformating penalty * i386.h (INTEGER_CLASS_P, MAYBE_INTEGER_CLASS_P): New. (CLASS_MAX_NREGS): Use it. * i386.h (HARD_REGNO_NREGS): Handle properly TF and TCmodes on 64bit; handle properly complex values. (CLASS_MAX_NREGS): Likewise; update comment. From-SVN: r41206 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 7b97401bf57..286a585c2b0 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,15 @@ +Mon Apr 9 16:18:03 CEST 2001 Jan Hubicka + + * i386.c (expand_fp_movcc): Fix condition reversal code. + + * i386.c (ix86_register_move_cost): Fix handling of reformating penalty + * i386.h (INTEGER_CLASS_P, MAYBE_INTEGER_CLASS_P): New. + (CLASS_MAX_NREGS): Use it. + + * i386.h (HARD_REGNO_NREGS): Handle properly TF and TCmodes on 64bit; + handle properly complex values. + (CLASS_MAX_NREGS): Likewise; update comment. + 2001-04-05 Bernd Schmidt * ia64.c (ia64_flag_schedule_insns2): New variable. diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index a3bbc7827e9..a108a97571b 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -6605,7 +6605,8 @@ ix86_expand_fp_movcc (operands) /* We may be called from the post-reload splitter. */ && (!REG_P (operands[0]) || SSE_REG_P (operands[0]) - || REGNO (operands[0]) >= FIRST_PSEUDO_REGISTER)) + || REGNO (operands[0]) >= FIRST_PSEUDO_REGISTER) + && 0) { rtx op0 = ix86_compare_op0, op1 = ix86_compare_op1; code = GET_CODE (operands[1]); @@ -6668,7 +6669,7 @@ ix86_expand_fp_movcc (operands) { rtx tmp = operands[2]; operands[2] = operands[3]; - operands[2] = tmp; + operands[3] = tmp; operands[1] = gen_rtx_fmt_ee (reverse_condition_maybe_unordered (GET_CODE (operands[1])), VOIDmode, ix86_compare_op0, @@ -10400,13 +10401,13 @@ ix86_register_move_cost (mode, class1, class2) stall. Count this as arbitarily high cost of 20. */ if (ix86_secondary_memory_needed (class1, class2, mode, 0)) { + int add_cost = 0; if (CLASS_MAX_NREGS (class1, mode) > CLASS_MAX_NREGS (class2, mode)) - return 10; + add_cost = 20; return (MEMORY_MOVE_COST (mode, class1, 0) - + MEMORY_MOVE_COST (mode, class2, 1)); + + MEMORY_MOVE_COST (mode, class2, 1) + add_cost); } - /* Moves between SSE/MMX and integer unit are expensive. - ??? We should make this cost CPU specific. */ + /* Moves between SSE/MMX and integer unit are expensive. */ if (MMX_CLASS_P (class1) != MMX_CLASS_P (class2) || SSE_CLASS_P (class1) != SSE_CLASS_P (class2)) return ix86_cost->mmxsse_to_integer; diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h index c44882781bc..92a347d0b76 100644 --- a/gcc/config/i386/i386.h +++ b/gcc/config/i386/i386.h @@ -851,9 +851,12 @@ extern int ix86_arch; */ #define HARD_REGNO_NREGS(REGNO, MODE) \ - (FP_REGNO_P (REGNO) || SSE_REGNO_P (REGNO) || MMX_REGNO_P (REGNO) ? 1 \ + (FP_REGNO_P (REGNO) || SSE_REGNO_P (REGNO) || MMX_REGNO_P (REGNO) \ + ? (COMPLEX_MODE_P (MODE) ? 2 : 1) \ : (MODE == TFmode \ - ? 3 \ + ? (TARGET_64BIT ? 2 : 3) \ + : MODE == TCmode \ + ? (TARGET_64BIT ? 4 : 6) \ : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))) #define VALID_SSE_REG_MODE(MODE) \ @@ -1067,9 +1070,11 @@ enum reg_class #define N_REG_CLASSES (int) LIM_REG_CLASSES +#define INTEGER_CLASS_P(CLASS) (reg_class_subset_p (CLASS, GENERAL_REGS)) #define FLOAT_CLASS_P(CLASS) (reg_class_subset_p (CLASS, FLOAT_REGS)) #define SSE_CLASS_P(CLASS) (reg_class_subset_p (CLASS, SSE_REGS)) #define MMX_CLASS_P(CLASS) (reg_class_subset_p (CLASS, MMX_REGS)) +#define MAYBE_INTEGER_CLASS_P(CLASS) (reg_classes_intersect_p (CLASS, GENERAL_REGS)) #define MAYBE_FLOAT_CLASS_P(CLASS) (reg_classes_intersect_p (CLASS, FLOAT_REGS)) #define MAYBE_SSE_CLASS_P(CLASS) (reg_classes_intersect_p (SSE_REGS, CLASS)) #define MAYBE_MMX_CLASS_P(CLASS) (reg_classes_intersect_p (MMX_REGS, CLASS)) @@ -1314,11 +1319,15 @@ enum reg_class /* Return the maximum number of consecutive registers needed to represent mode MODE in a register of class CLASS. */ /* On the 80386, this is the size of MODE in words, - except in the FP regs, where a single reg is always enough. */ + except in the FP regs, where a single reg is always enough. + The TFmodes are really just 80bit values, so we use only 3 registers + to hold them, instead of 4, as the size would suggest. + */ #define CLASS_MAX_NREGS(CLASS, MODE) \ - (FLOAT_CLASS_P (CLASS) || SSE_CLASS_P (CLASS) || MMX_CLASS_P (CLASS) \ - ? 1 \ - : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) + (!MAYBE_INTEGER_CLASS_P (CLASS) \ + ? (COMPLEX_MODE_P (MODE) ? 2 : 1) \ + : ((GET_MODE_SIZE ((MODE) == TFmode ? XFmode : (MODE)) \ + + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) /* A C expression whose value is nonzero if pseudos that have been assigned to registers of class CLASS would likely be spilled