From: Jakub Jelinek Date: Thu, 2 Jun 2016 11:02:26 +0000 (+0200) Subject: sse.md (*vec_concatv4si): Use v=v,v instead of x=x,x and v=v,m instead of x=x,m. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=930ebd0e2a99523b7991c71436e58bdf1dc43fe3;p=gcc.git sse.md (*vec_concatv4si): Use v=v,v instead of x=x,x and v=v,m instead of x=x,m. * config/i386/sse.md (*vec_concatv4si): Use v=v,v instead of x=x,x and v=v,m instead of x=x,m. * gcc.target/i386/avx512vl-concatv4si-1.c: New test. From-SVN: r237031 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index bff65129842..6c983ac1df1 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,8 @@ 2016-06-02 Jakub Jelinek + * config/i386/sse.md (*vec_concatv4si): Use v=v,v instead of + x=x,x and v=v,m instead of x=x,m. + * config/i386/sse.md (*vec_concatv2si_sse4_1): Add avx512dq v=Yv,rm alternative. Change x=x,x alternative to v=Yv,Yv and x=rm,C alternative to v=rm,C. diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 2a11887adb0..5e7460841a0 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -13549,10 +13549,10 @@ (set_attr "mode" "TI,TI,DI,V4SF,SF,DI,DI")]) (define_insn "*vec_concatv4si" - [(set (match_operand:V4SI 0 "register_operand" "=x,x,x,x,x") + [(set (match_operand:V4SI 0 "register_operand" "=x,v,x,x,v") (vec_concat:V4SI - (match_operand:V2SI 1 "register_operand" " 0,x,0,0,x") - (match_operand:V2SI 2 "nonimmediate_operand" " x,x,x,m,m")))] + (match_operand:V2SI 1 "register_operand" " 0,v,0,0,v") + (match_operand:V2SI 2 "nonimmediate_operand" " x,v,x,m,m")))] "TARGET_SSE" "@ punpcklqdq\t{%2, %0|%0, %2} @@ -13562,7 +13562,7 @@ vmovhps\t{%2, %1, %0|%0, %1, %q2}" [(set_attr "isa" "sse2_noavx,avx,noavx,noavx,avx") (set_attr "type" "sselog,sselog,ssemov,ssemov,ssemov") - (set_attr "prefix" "orig,vex,orig,orig,vex") + (set_attr "prefix" "orig,maybe_evex,orig,orig,maybe_evex") (set_attr "mode" "TI,TI,V4SF,V2SF,V2SF")]) ;; movd instead of movq is required to handle broken assemblers. diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 3d279fdbf03..c4b2f2510a4 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,5 +1,7 @@ 2016-06-02 Jakub Jelinek + * gcc.target/i386/avx512vl-concatv4si-1.c: New test. + * gcc.target/i386/avx512dq-concatv2si-1.c: New test. * gcc.target/i386/avx512vl-concatv2si-1.c: New test. diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-concatv4si-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-concatv4si-1.c new file mode 100644 index 00000000000..88d4682278c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-concatv4si-1.c @@ -0,0 +1,23 @@ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-O2 -mavx512vl" } */ + +typedef int V __attribute__((vector_size (8))); +typedef int W __attribute__((vector_size (16))); + +void +f1 (V x, V y) +{ + register W c __asm ("xmm16"); + c = (W) { x[0], x[1], x[0], x[1] }; + asm volatile ("" : "+v" (c)); +} + +void +f2 (V x, V *y) +{ + register W c __asm ("xmm16"); + c = (W) { x[0], x[1], (*y)[0], (*y)[1] }; + asm volatile ("" : "+v" (c)); +} + +/* { dg-final { scan-assembler-times "vpunpcklqdq\[^\n\r]*xmm16" 2 } } */