From: Luke Kenneth Casson Leighton Date: Mon, 5 Jul 2021 17:33:17 +0000 (+0100) Subject: add last_op_svshape flag to ISACaller X-Git-Tag: xlen-bcd~348 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=9325c7113e9a5036d41e95165b17b3cddcae693e;p=openpower-isa.git add last_op_svshape flag to ISACaller --- diff --git a/src/openpower/decoder/isa/caller.py b/src/openpower/decoder/isa/caller.py index 06abbf28..fb17a1f2 100644 --- a/src/openpower/decoder/isa/caller.py +++ b/src/openpower/decoder/isa/caller.py @@ -588,10 +588,17 @@ class ISACaller: self.gpr = GPR(decoder2, self, self.svstate, regfile) self.fpr = GPR(decoder2, self, self.svstate, fpregfile) self.spr = SPR(decoder2, initial_sprs) # initialise SPRs before MMU + + # set up 4 dummy SVSHAPEs if they aren't already set up for i in range(4): sname = 'SVSHAPE%d' % i if sname not in self.spr: self.spr[sname] = SVSHAPE(0) + else: + # make sure it's an SVSHAPE + val = self.spr[sname].value + self.spr[sname] = SVSHAPE(val) + self.last_op_svshape = False # "raw" memory self.mem = Mem(row_bytes=8, initial_mem=initial_mem) @@ -1437,6 +1444,13 @@ class ISACaller: # reset loop to zero self.svp64_reset_loop() + # XXX only in non-SVP64 mode! + # record state of whether the current operation was an svshape, + # to be able to know if it should apply in the next instruction. + # also (if going to use this instruction) should disable ability + # to interrupt in between. sigh. + self.last_op_svshape = name == 'svshape' + self.update_pc_next() def update_pc_next(self):