From: Tamar Christina Date: Wed, 22 Nov 2017 15:54:48 +0000 (+0000) Subject: 2017-11-22 Tamar Christina X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=9388732aa53da50828a37884c88adae7fd313839;p=gcc.git 2017-11-22 Tamar Christina * config/arm/arm_neon.h (vdot_u32, vdotq_u32) (vdot_s32, vdotq_s32): New. (vdot_lane_u32, vdotq_lane_u32): New. (vdot_lane_s32, vdotq_lane_s32): New. gcc/testsuite/ 2017-11-22 Tamar Christina * gcc.target/arm/simd/vdot-compile.c: New. * gcc.target/arm/simd/vect-dot-qi.h: New. * gcc.target/arm/simd/vect-dot-s8.c: New. * gcc.target/arm/simd/vect-dot-u8.c: New From-SVN: r255064 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index e4efc762016..412fc15adb1 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2017-11-22 Tamar Christina + + * config/arm/arm_neon.h (vdot_u32, vdotq_u32) + (vdot_s32, vdotq_s32): New. + (vdot_lane_u32, vdotq_lane_u32): New. + (vdot_lane_s32, vdotq_lane_s32): New. + + 2017-11-22 Richard Sandiford PR middle-end/82547 diff --git a/gcc/config/arm/arm_neon.h b/gcc/config/arm/arm_neon.h index 0d436e83d0f..3c9a8d90e53 100644 --- a/gcc/config/arm/arm_neon.h +++ b/gcc/config/arm/arm_neon.h @@ -18034,6 +18034,72 @@ vzipq_f16 (float16x8_t __a, float16x8_t __b) #endif +/* AdvSIMD Dot Product intrinsics. */ + +#pragma GCC push_options +#if __ARM_ARCH >= 8 +#pragma GCC target ("arch=armv8.2-a+dotprod") + +__extension__ extern __inline uint32x2_t +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) +vdot_u32 (uint32x2_t __r, uint8x8_t __a, uint8x8_t __b) +{ + return __builtin_neon_udotv8qi_uuuu (__r, __a, __b); +} + +__extension__ extern __inline uint32x4_t +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) +vdotq_u32 (uint32x4_t __r, uint8x16_t __a, uint8x16_t __b) +{ + return __builtin_neon_udotv16qi_uuuu (__r, __a, __b); +} + +__extension__ extern __inline int32x2_t +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) +vdot_s32 (int32x2_t __r, int8x8_t __a, int8x8_t __b) +{ + return __builtin_neon_sdotv8qi (__r, __a, __b); +} + +__extension__ extern __inline int32x4_t +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) +vdotq_s32 (int32x4_t __r, int8x16_t __a, int8x16_t __b) +{ + return __builtin_neon_sdotv16qi (__r, __a, __b); +} + +__extension__ extern __inline uint32x2_t +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) +vdot_lane_u32 (uint32x2_t __r, uint8x8_t __a, uint8x8_t __b, const int __index) +{ + return __builtin_neon_udot_lanev8qi_uuuus (__r, __a, __b, __index); +} + +__extension__ extern __inline uint32x4_t +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) +vdotq_lane_u32 (uint32x4_t __r, uint8x16_t __a, uint8x8_t __b, + const int __index) +{ + return __builtin_neon_udot_lanev16qi_uuuus (__r, __a, __b, __index); +} + +__extension__ extern __inline int32x2_t +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) +vdot_lane_s32 (int32x2_t __r, int8x8_t __a, int8x8_t __b, const int __index) +{ + return __builtin_neon_sdot_lanev8qi (__r, __a, __b, __index); +} + +__extension__ extern __inline int32x4_t +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) +vdotq_lane_s32 (int32x4_t __r, int8x16_t __a, int8x8_t __b, const int __index) +{ + return __builtin_neon_sdot_lanev16qi (__r, __a, __b, __index); +} + +#pragma GCC pop_options +#endif + #ifdef __cplusplus } #endif diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index d0acd6d3404..04d1b2c1523 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,10 @@ +2017-11-22 Tamar Christina + + * gcc.target/arm/simd/vdot-compile.c: New. + * gcc.target/arm/simd/vect-dot-qi.h: New. + * gcc.target/arm/simd/vect-dot-s8.c: New. + * gcc.target/arm/simd/vect-dot-u8.c: New + 2017-11-22 Uros Bizjak * lib/target-supports.exp (check_effective_target_bswap16): diff --git a/gcc/testsuite/gcc.target/arm/simd/vdot-compile.c b/gcc/testsuite/gcc.target/arm/simd/vdot-compile.c new file mode 100644 index 00000000000..b3bd3bf00e3 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/simd/vdot-compile.c @@ -0,0 +1,56 @@ +/* { dg-do compile } */ +/* { dg-additional-options "-O3" } */ +/* { dg-require-effective-target arm_v8_2a_dotprod_neon_ok } */ +/* { dg-add-options arm_v8_2a_dotprod_neon } */ + +#include + +/* Unsigned Dot Product instructions. */ + +uint32x2_t ufoo (uint32x2_t r, uint8x8_t x, uint8x8_t y) +{ + return vdot_u32 (r, x, y); +} + +uint32x4_t ufooq (uint32x4_t r, uint8x16_t x, uint8x16_t y) +{ + return vdotq_u32 (r, x, y); +} + +uint32x2_t ufoo_lane (uint32x2_t r, uint8x8_t x, uint8x8_t y) +{ + return vdot_lane_u32 (r, x, y, 0); +} + +uint32x4_t ufooq_lane (uint32x4_t r, uint8x16_t x, uint8x8_t y) +{ + return vdotq_lane_u32 (r, x, y, 0); +} + +/* Signed Dot Product instructions. */ + +int32x2_t sfoo (int32x2_t r, int8x8_t x, int8x8_t y) +{ + return vdot_s32 (r, x, y); +} + +int32x4_t sfooq (int32x4_t r, int8x16_t x, int8x16_t y) +{ + return vdotq_s32 (r, x, y); +} + +int32x2_t sfoo_lane (int32x2_t r, int8x8_t x, int8x8_t y) +{ + return vdot_lane_s32 (r, x, y, 0); +} + +int32x4_t sfooq_lane (int32x4_t r, int8x16_t x, int8x8_t y) +{ + return vdotq_lane_s32 (r, x, y, 0); +} + +/* { dg-final { scan-assembler-times {v[us]dot\.[us]8\td[0-9]+, d[0-9]+, d[0-9]+} 4 } } */ +/* { dg-final { scan-assembler-times {v[us]dot\.[us]8\tq[0-9]+, q[0-9]+, q[0-9]+} 2 } } */ +/* { dg-final { scan-assembler-times {v[us]dot\.[us]8\td[0-9]+, d[0-9]+, d[0-9]+\[#?[0-9]\]} 2 } } */ +/* { dg-final { scan-assembler-times {v[us]dot\.[us]8\tq[0-9]+, q[0-9]+, d[0-9]+\[#?[0-9]\]} 2 } } */ + diff --git a/gcc/testsuite/gcc.target/arm/simd/vect-dot-qi.h b/gcc/testsuite/gcc.target/arm/simd/vect-dot-qi.h new file mode 100644 index 00000000000..ea5c212419d --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/simd/vect-dot-qi.h @@ -0,0 +1,16 @@ +TYPE char X[N] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__))); +TYPE char Y[N] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__))); + +__attribute__ ((noinline)) int +foo1(int len) { + int i; + TYPE int result = 0; + TYPE short prod; + + for (i=0; i