From: lkcl <lkcl@web>
Date: Sat, 15 Apr 2023 22:53:17 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls009_v1~54
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=939783e0cd8f031858434b19a96e3ea207356094;p=libreriscv.git

---

diff --git a/openpower/sv/remap.mdwn b/openpower/sv/remap.mdwn
index 39e4d4aea..6ae71828d 100644
--- a/openpower/sv/remap.mdwn
+++ b/openpower/sv/remap.mdwn
@@ -128,7 +128,7 @@ a 5x4 result:
 ```
     svshape 5, 4, 3, 0, 0           # Outer Product
     svremap 15, 1, 2, 3, 0, 0, 0, 0
-    sv.fmadds *0, *16, *32, *0
+    sv.fmadds *0, *32, *64, *0
 ```
 
 * svshape sets up the four SVSHAPE SPRS for a Matrix Schedule
@@ -139,7 +139,7 @@ a 5x4 result:
   - RC to use SVSHAPE3
   - RT to use SVSHAPE0
   - RS Remapping to not be activated
-* sv.fmadds has Vectors at RT=0, RA=16, RB=32, RC=0
+* sv.fmadds has Vectors at RT=0, RA=32, RB=64, RC=0
 * With REMAP being active each register's element index is
   *independently* transformed using the specified SHAPEs.