From: Nick Clifton Date: Mon, 24 Mar 2003 15:43:15 +0000 (+0000) Subject: Rename the all occurances of C54X to TIC54X. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=9418ab9c20308c55347c96e84e2c2f9d0362be0e;p=binutils-gdb.git Rename the all occurances of C54X to TIC54X. --- diff --git a/gas/ChangeLog b/gas/ChangeLog index 7d1305cf4a6..2dc1b47766d 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,9 @@ +2003-03-24 Daniel Néri + + * doc/as.texinfo: Rename the all occurances of C54X to TIC54X. + * doc/all.texi: Likewise. + * doc/c-tic54x.texi: Likewise. + 2003-03-21 Andreas Schwab * config/tc-ia64.c (generate_unwind_image): Fix type of unw_rec to diff --git a/gas/doc/all.texi b/gas/doc/all.texi index b9754de4486..30f02db86e2 100644 --- a/gas/doc/all.texi +++ b/gas/doc/all.texi @@ -54,7 +54,7 @@ @set PPC @set SH @set SPARC -@set C54X +@set TIC54X @set V850 @set VAX @set VXWORKS diff --git a/gas/doc/as.texinfo b/gas/doc/as.texinfo index f27c93e4f2b..41867f6b10b 100644 --- a/gas/doc/as.texinfo +++ b/gas/doc/as.texinfo @@ -56,7 +56,7 @@ @set PPC @set SH @set SPARC -@set C54X +@set TIC54X @set V850 @set VAX @end ifset diff --git a/gas/doc/c-tic54x.texi b/gas/doc/c-tic54x.texi index 500f278126d..77db23cb761 100644 --- a/gas/doc/c-tic54x.texi +++ b/gas/doc/c-tic54x.texi @@ -4,35 +4,35 @@ @c TI TMS320C54X description by Timothy Wall, twall@cygnus.com @ifset GENERIC @page -@node C54X-Dependent -@chapter C54X Dependent Features +@node TIC54X-Dependent +@chapter TIC54X Dependent Features @end ifset @ifclear GENERIC @node Machine Dependencies -@chapter C54X Dependent Features +@chapter TIC54X Dependent Features @end ifclear -@cindex C54X support +@cindex TIC54X support @menu -* C54X-Opts:: Command-line Options -* C54X-Block:: Blocking -* C54X-Env:: Environment Settings -* C54X-Constants:: Constants Syntax -* C54X-Subsyms:: String Substitution -* C54X-Locals:: Local Label Syntax -* C54X-Builtins:: Builtin Assembler Math Functions -* C54X-Ext:: Extended Addressing Support -* C54X-Directives:: Directives -* C54X-Macros:: Macro Features -* C54X-MMRegs:: Memory-mapped Registers +* TIC54X-Opts:: Command-line Options +* TIC54X-Block:: Blocking +* TIC54X-Env:: Environment Settings +* TIC54X-Constants:: Constants Syntax +* TIC54X-Subsyms:: String Substitution +* TIC54X-Locals:: Local Label Syntax +* TIC54X-Builtins:: Builtin Assembler Math Functions +* TIC54X-Ext:: Extended Addressing Support +* TIC54X-Directives:: Directives +* TIC54X-Macros:: Macro Features +* TIC54X-MMRegs:: Memory-mapped Registers @end menu -@node C54X-Opts +@node TIC54X-Opts @section Options -@cindex options, C54X -@cindex C54X options -The 'c54x version of @code{@value{AS}} has a few machine-dependent options. +@cindex options, TIC54X +@cindex TIC54X options +The TMS320C54x version of @code{@value{AS}} has a few machine-dependent options. @cindex @samp{-mfar-mode} option, far-mode @cindex @samp{-mf} option, far-mode @@ -47,7 +47,7 @@ This option may be abbreviated to @samp{-mf}. You can use the @samp{-mcpu} option to specify a particular CPU. This option is equivalent to using the @samp{.version} directive in the assembly code. For recognized CPU codes, see -@xref{C54X-Directives,,@code{.version}}. The default CPU version is +@xref{TIC54X-Directives,,@code{.version}}. The default CPU version is @samp{542}. @cindex @samp{-merrors-to-file} option, stderr redirect @@ -57,31 +57,31 @@ to a file (this provided for those deficient environments which don't provide adequate output redirection). This option may be abbreviated to @samp{-me}. -@node C54X-Block +@node TIC54X-Block @section Blocking A blocked section or memory block is guaranteed not to cross the blocking boundary (usually a page, or 128 words) if it is smaller than the blocking size, or to start on a page boundary if it is larger than the blocking size. -@node C54X-Env +@node TIC54X-Env @section Environment Settings -@cindex environment settings, C54X -@cindex @samp{A_DIR} environment variable, C54X -@cindex @samp{C54XDSP_DIR} environment variable, C54X +@cindex environment settings, TIC54X +@cindex @samp{A_DIR} environment variable, TIC54X +@cindex @samp{C54XDSP_DIR} environment variable, TIC54X @samp{C54XDSP_DIR} and @samp{A_DIR} are semicolon-separated paths which are added to the list of directories normally searched for source and include files. @samp{C54XDSP_DIR} will override @samp{A_DIR}. -@node C54X-Constants +@node TIC54X-Constants @section Constants Syntax -@cindex constants, C54X -The C54X version of @code{@value{AS}} allows the following additional +@cindex constants, TIC54X +The TIC54X version of @code{@value{AS}} allows the following additional constant formats, using a suffix to indicate the radix: @smallexample -@cindex binary constants, C54X +@cindex binary constants, TIC54X Binary @code{000000B, 011000b} Octal @code{10Q, 224q} @@ -89,7 +89,7 @@ Hexadecimal @code{45h, 0FH} @end smallexample -@node C54X-Subsyms +@node TIC54X-Subsyms @section String Substitution A subset of allowable symbols (which we'll call subsyms) may be assigned arbitrary string values. This is roughly equivalent to C preprocessor @@ -98,8 +98,8 @@ symbols, the symbol is replaced in the input stream by its string value. Subsym names @strong{must} begin with a letter. Subsyms may be defined using the @code{.asg} and @code{.eval} directives -(@xref{C54X-Directives,,@code{.asg}}, -@xref{C54X-Directives,,@code{.eval}}. +(@xref{TIC54X-Directives,,@code{.asg}}, +@xref{TIC54X-Directives,,@code{.eval}}. Expansion is recursive until a previously encountered symbol is seen, at which point substitution stops. @@ -119,7 +119,7 @@ Macro parameters are converted to subsyms; a side effect of this is the normal @code{@value{AS}} '\ARG' dereferencing syntax is unnecessary. Subsyms defined within a macro will have global scope, unless the @code{.var} directive is used to identify the subsym as a local macro variable -@pxref{C54X-Directives,,@code{.var}}. +@pxref{TIC54X-Directives,,@code{.var}}. Substitution may be forced in situations where replacement might be ambiguous by placing colons on either side of the subsym. The following @@ -147,7 +147,7 @@ Evaluates to a substring of @var{symbol} beginning at @var{start} with length @var{length}. @end table -@node C54X-Locals +@node TIC54X-Locals @section Local Labels Local labels may be defined in two ways: @@ -164,7 +164,7 @@ This happens when one of the following situations is encountered: @itemize @bullet @item -.newblock directive @pxref{C54X-Directives,,@code{.newblock}} +.newblock directive @pxref{TIC54X-Directives,,@code{.newblock}} @item The current section is changed (.sect, .text, or .data) @item @@ -173,12 +173,12 @@ Entering or leaving an included file The macro scope where the label was defined is exited @end itemize -@node C54X-Builtins +@node TIC54X-Builtins @section Math Builtins -@cindex math builtins, C54X -@cindex C54X builtin math functions -@cindex builtin math functions, C54X +@cindex math builtins, TIC54X +@cindex TIC54X builtin math functions +@cindex builtin math functions, TIC54X The following built-in functions may be used to generate a floating-point value. All return a floating-point value except @@ -186,123 +186,123 @@ floating-point value. All return a floating-point value except value. @table @code -@cindex @code{$acos} math builtin, C54X +@cindex @code{$acos} math builtin, TIC54X @item @code{$acos(@var{expr})} Returns the floating point arccosine of @var{expr}. -@cindex @code{$asin} math builtin, C54X +@cindex @code{$asin} math builtin, TIC54X @item @code{$asin(@var{expr})} Returns the floating point arcsine of @var{expr}. -@cindex @code{$atan} math builtin, C54X +@cindex @code{$atan} math builtin, TIC54X @item @code{$atan(@var{expr})} Returns the floating point arctangent of @var{expr}. -@cindex @code{$atan2} math builtin, C54X +@cindex @code{$atan2} math builtin, TIC54X @item @code{$atan2(@var{expr1},@var{expr2})} Returns the floating point arctangent of @var{expr1} / @var{expr2}. -@cindex @code{$ceil} math builtin, C54X +@cindex @code{$ceil} math builtin, TIC54X @item @code{$ceil(@var{expr})} Returns the smallest integer not less than @var{expr} as floating point. -@cindex @code{$cosh} math builtin, C54X +@cindex @code{$cosh} math builtin, TIC54X @item @code{$cosh(@var{expr})} Returns the floating point hyperbolic cosine of @var{expr}. -@cindex @code{$cos} math builtin, C54X +@cindex @code{$cos} math builtin, TIC54X @item @code{$cos(@var{expr})} Returns the floating point cosine of @var{expr}. -@cindex @code{$cvf} math builtin, C54X +@cindex @code{$cvf} math builtin, TIC54X @item @code{$cvf(@var{expr})} Returns the integer value @var{expr} converted to floating-point. -@cindex @code{$cvi} math builtin, C54X +@cindex @code{$cvi} math builtin, TIC54X @item @code{$cvi(@var{expr})} Returns the floating point value @var{expr} converted to integer. -@cindex @code{$exp} math builtin, C54X +@cindex @code{$exp} math builtin, TIC54X @item @code{$exp(@var{expr})} Returns the floating point value e ^ @var{expr}. -@cindex @code{$fabs} math builtin, C54X +@cindex @code{$fabs} math builtin, TIC54X @item @code{$fabs(@var{expr})} Returns the floating point absolute value of @var{expr}. -@cindex @code{$floor} math builtin, C54X +@cindex @code{$floor} math builtin, TIC54X @item @code{$floor(@var{expr})} Returns the largest integer that is not greater than @var{expr} as floating point. -@cindex @code{$fmod} math builtin, C54X +@cindex @code{$fmod} math builtin, TIC54X @item @code{$fmod(@var{expr1},@var{expr2})} Returns the floating point remainder of @var{expr1} / @var{expr2}. -@cindex @code{$int} math builtin, C54X +@cindex @code{$int} math builtin, TIC54X @item @code{$int(@var{expr})} Returns 1 if @var{expr} evaluates to an integer, zero otherwise. -@cindex @code{$ldexp} math builtin, C54X +@cindex @code{$ldexp} math builtin, TIC54X @item @code{$ldexp(@var{expr1},@var{expr2})} Returns the floating point value @var{expr1} * 2 ^ @var{expr2}. -@cindex @code{$log10} math builtin, C54X +@cindex @code{$log10} math builtin, TIC54X @item @code{$log10(@var{expr})} Returns the base 10 logarithm of @var{expr}. -@cindex @code{$log} math builtin, C54X +@cindex @code{$log} math builtin, TIC54X @item @code{$log(@var{expr})} Returns the natural logarithm of @var{expr}. -@cindex @code{$max} math builtin, C54X +@cindex @code{$max} math builtin, TIC54X @item @code{$max(@var{expr1},@var{expr2})} Returns the floating point maximum of @var{expr1} and @var{expr2}. -@cindex @code{$min} math builtin, C54X +@cindex @code{$min} math builtin, TIC54X @item @code{$min(@var{expr1},@var{expr2})} Returns the floating point minimum of @var{expr1} and @var{expr2}. -@cindex @code{$pow} math builtin, C54X +@cindex @code{$pow} math builtin, TIC54X @item @code{$pow(@var{expr1},@var{expr2})} Returns the floating point value @var{expr1} ^ @var{expr2}. -@cindex @code{$round} math builtin, C54X +@cindex @code{$round} math builtin, TIC54X @item @code{$round(@var{expr})} Returns the nearest integer to @var{expr} as a floating point number. -@cindex @code{$sgn} math builtin, C54X +@cindex @code{$sgn} math builtin, TIC54X @item @code{$sgn(@var{expr})} Returns -1, 0, or 1 based on the sign of @var{expr}. -@cindex @code{$sin} math builtin, C54X +@cindex @code{$sin} math builtin, TIC54X @item @code{$sin(@var{expr})} Returns the floating point sine of @var{expr}. -@cindex @code{$sinh} math builtin, C54X +@cindex @code{$sinh} math builtin, TIC54X @item @code{$sinh(@var{expr})} Returns the floating point hyperbolic sine of @var{expr}. -@cindex @code{$sqrt} math builtin, C54X +@cindex @code{$sqrt} math builtin, TIC54X @item @code{$sqrt(@var{expr})} Returns the floating point square root of @var{expr}. -@cindex @code{$tan} math builtin, C54X +@cindex @code{$tan} math builtin, TIC54X @item @code{$tan(@var{expr})} Returns the floating point tangent of @var{expr}. -@cindex @code{$tanh} math builtin, C54X +@cindex @code{$tanh} math builtin, TIC54X @item @code{$tanh(@var{expr})} Returns the floating point hyperbolic tangent of @var{expr}. -@cindex @code{$trunc} math builtin, C54X +@cindex @code{$trunc} math builtin, TIC54X @item @code{$trunc(@var{expr})} Returns the integer value of @var{expr} truncated towards zero as floating point. @end table -@node C54X-Ext +@node TIC54X-Ext @section Extended Addressing The @code{LDX} pseudo-op is provided for loading the extended addressing bits of a label or address. For example, if an address @code{_label} resides @@ -314,16 +314,16 @@ follows: bacc a ; full address is in accumulator A @end smallexample -@node C54X-Directives +@node TIC54X-Directives @section Directives -@cindex machine directives, C54X -@cindex C54X machine directives +@cindex machine directives, TIC54X +@cindex TIC54X machine directives @table @code -@cindex @code{align} directive, C54X -@cindex @code{even} directive, C54X +@cindex @code{align} directive, TIC54X +@cindex @code{even} directive, TIC54X @item .align [@var{size}] @itemx .even Align the section program counter on the next boundary, based on @@ -338,18 +338,18 @@ Align SPC to longword boundary (same as .even) Align SPC to page boundary @end table -@cindex @code{asg} directive, C54X +@cindex @code{asg} directive, TIC54X @item .asg @var{string}, @var{name} Assign @var{name} the string @var{string}. String replacement is performed on @var{string} before assignment. -@cindex @code{eval} directive, C54X +@cindex @code{eval} directive, TIC54X @itemx .eval @var{string}, @var{name} Evaluate the contents of string @var{string} and assign the result as a string to the subsym @var{name}. String replacement is performed on @var{string} before assignment. -@cindex @code{bss} directive, C54X +@cindex @code{bss} directive, TIC54X @item .bss @var{symbol}, @var{size} [, [@var{blocking_flag}] [,@var{alignment_flag}]] Reserve space for @var{symbol} in the .bss section. @var{size} is in words. If present, @var{blocking_flag} indicates the allocated space @@ -357,10 +357,10 @@ should be aligned on a page boundary if it would otherwise cross a page boundary. If present, @var{alignment_flag} causes the assembler to allocate @var{size} on a long word boundary. -@cindex @code{byte} directive, C54X -@cindex @code{ubyte} directive, C54X -@cindex @code{char} directive, C54X -@cindex @code{uchar} directive, C54X +@cindex @code{byte} directive, TIC54X +@cindex @code{ubyte} directive, TIC54X +@cindex @code{char} directive, TIC54X +@cindex @code{uchar} directive, TIC54X @item .byte @var{value} [,...,@var{value_n}] @itemx .ubyte @var{value} [,...,@var{value_n}] @itemx .char @var{value} [,...,@var{value_n}] @@ -369,18 +369,18 @@ Place one or more bytes into consecutive words of the current section. The upper 8 bits of each word is zero-filled. If a label is used, it points to the word allocated for the first byte encountered. -@cindex @code{clink} directive, C54X +@cindex @code{clink} directive, TIC54X @item .clink ["@var{section_name}"] Set STYP_CLINK flag for this section, which indicates to the linker that if no symbols from this section are referenced, the section should not be included in the link. If @var{section_name} is omitted, the current section is used. -@cindex @code{c_mode} directive, C54X +@cindex @code{c_mode} directive, TIC54X @item .c_mode TBD. -@cindex @code{copy} directive, C54X +@cindex @code{copy} directive, TIC54X @item .copy "@var{filename}" | @var{filename} @itemx .include "@var{filename}" | @var{filename} Read source statements from @var{filename}. The normal include search @@ -388,14 +388,14 @@ path is used. Normally .copy will cause statements from the included file to be printed in the assembly listing and .include will not, but this distinction is not currently implemented. -@cindex @code{data} directive, C54X +@cindex @code{data} directive, TIC54X @item .data Begin assembling code into the .data section. -@cindex @code{double} directive, C54X -@cindex @code{ldouble} directive, C54X -@cindex @code{float} directive, C54X -@cindex @code{xfloat} directive, C54X +@cindex @code{double} directive, TIC54X +@cindex @code{ldouble} directive, TIC54X +@cindex @code{float} directive, TIC54X +@cindex @code{xfloat} directive, TIC54X @item .double @var{value} [,...,@var{value_n}] @itemx .ldouble @var{value} [,...,@var{value_n}] @itemx .float @var{value} [,...,@var{value_n}] @@ -405,32 +405,32 @@ more floating-point values into the current section. All but @code{.xfloat} align the result on a longword boundary. Values are stored most-significant word first. -@cindex @code{drlist} directive, C54X -@cindex @code{drnolist} directive, C54X +@cindex @code{drlist} directive, TIC54X +@cindex @code{drnolist} directive, TIC54X @item .drlist @itemx .drnolist Control printing of directives to the listing file. Ignored. -@cindex @code{emsg} directive, C54X -@cindex @code{mmsg} directive, C54X -@cindex @code{wmsg} directive, C54X +@cindex @code{emsg} directive, TIC54X +@cindex @code{mmsg} directive, TIC54X +@cindex @code{wmsg} directive, TIC54X @item .emsg @var{string} @itemx .mmsg @var{string} @itemx .wmsg @var{string} Emit a user-defined error, message, or warning, respectively. -@cindex @code{far_mode} directive, C54X +@cindex @code{far_mode} directive, TIC54X @item .far_mode Use extended addressing when assembling statements. This should appear -only once per file, and is equivalent to the -mfar-mode option @pxref{C54X-Opts,,@code{-mfar-mode}}. +only once per file, and is equivalent to the -mfar-mode option @pxref{TIC54X-Opts,,@code{-mfar-mode}}. -@cindex @code{fclist} directive, C54X -@cindex @code{fcnolist} directive, C54X +@cindex @code{fclist} directive, TIC54X +@cindex @code{fcnolist} directive, TIC54X @item .fclist @itemx .fcnolist Control printing of false conditional blocks to the listing file. -@cindex @code{field} directive, C54X +@cindex @code{field} directive, TIC54X @item .field @var{value} [,@var{size}] Initialize a bitfield of @var{size} bits in the current section. If @var{value} is relocatable, then @var{size} must be 16. @var{size} @@ -443,9 +443,9 @@ directive with an operand of 1 will force the next @code{.field} directive to begin packing into a new word. If a label is used, it points to the word that contains the specified field. -@cindex @code{global} directive, C54X -@cindex @code{def} directive, C54X -@cindex @code{ref} directive, C54X +@cindex @code{global} directive, TIC54X +@cindex @code{def} directive, TIC54X +@cindex @code{ref} directive, TIC54X @item .global @var{symbol} [,...,@var{symbol_n}] @itemx .def @var{symbol} [,...,@var{symbol_n}] @itemx .ref @var{symbol} [,...,@var{symbol_n}] @@ -454,14 +454,14 @@ and availalbe to other files. @code{.ref} identifies a symbol used in the current file but defined elsewhere. Both map to the standard @code{.global} directive. -@cindex @code{half} directive, C54X -@cindex @code{uhalf} directive, C54X -@cindex @code{short} directive, C54X -@cindex @code{ushort} directive, C54X -@cindex @code{int} directive, C54X -@cindex @code{uint} directive, C54X -@cindex @code{word} directive, C54X -@cindex @code{uword} directive, C54X +@cindex @code{half} directive, TIC54X +@cindex @code{uhalf} directive, TIC54X +@cindex @code{short} directive, TIC54X +@cindex @code{ushort} directive, TIC54X +@cindex @code{int} directive, TIC54X +@cindex @code{uint} directive, TIC54X +@cindex @code{word} directive, TIC54X +@cindex @code{uword} directive, TIC54X @item .half @var{value} [,...,@var{value_n}] @itemx .uhalf @var{value} [,...,@var{value_n}] @itemx .short @var{value} [,...,@var{value_n}] @@ -474,26 +474,26 @@ Place one or more values into consecutive words of the current section. If a label is used, it points to the word allocated for the first value encountered. -@cindex @code{label} directive, C54X +@cindex @code{label} directive, TIC54X @item .label @var{symbol} Define a special @var{symbol} to refer to the load time address of the current section program counter. -@cindex @code{length} directive, C54X -@cindex @code{width} directive, C54X +@cindex @code{length} directive, TIC54X +@cindex @code{width} directive, TIC54X @item .length @itemx .width Set the page length and width of the output listing file. Ignored. -@cindex @code{list} directive, C54X -@cindex @code{nolist} directive, C54X +@cindex @code{list} directive, TIC54X +@cindex @code{nolist} directive, TIC54X @item .list @itemx .nolist Control whether the source listing is printed. Ignored. -@cindex @code{long} directive, C54X -@cindex @code{ulong} directive, C54X -@cindex @code{xlong} directive, C54X +@cindex @code{long} directive, TIC54X +@cindex @code{ulong} directive, TIC54X +@cindex @code{xlong} directive, TIC54X @item .long @var{value} [,...,@var{value_n}] @itemx .ulong @var{value} [,...,@var{value_n}] @itemx .xlong @var{value} [,...,@var{value_n}] @@ -502,9 +502,9 @@ section. The most significant word is stored first. @code{.long} and @code{.ulong} align the result on a longword boundary; @code{xlong} does not. -@cindex @code{loop} directive, C54X -@cindex @code{break} directive, C54X -@cindex @code{endloop} directive, C54X +@cindex @code{loop} directive, TIC54X +@cindex @code{break} directive, TIC54X +@cindex @code{endloop} directive, TIC54X @item .loop [@var{count}] @itemx .break [@var{condition}] @itemx .endloop @@ -515,62 +515,62 @@ and indicates the number of times the block should be repeated. @code{.endloop} directive. The optional @var{condition} will cause the loop to terminate only if it evaluates to zero. -@cindex @code{macro} directive, C54X -@cindex @code{endm} directive, C54X +@cindex @code{macro} directive, TIC54X +@cindex @code{endm} directive, TIC54X @item @var{macro_name} .macro [@var{param1}][,...@var{param_n}] @itemx [.mexit] @itemx .endm -See the section on macros for more explanation (@xref{C54X-Macros}. +See the section on macros for more explanation (@xref{TIC54X-Macros}. -@cindex @code{mlib} directive, C54X +@cindex @code{mlib} directive, TIC54X @item .mlib "@var{filename}" | @var{filename} Load the macro library @var{filename}. @var{filename} must be an archived library (BFD ar-compatible) of text files, expected to contain only macro definitions. The standard include search path is used. -@cindex @code{mlist} directive, C54X -@cindex @code{mnolist} directive, C54X +@cindex @code{mlist} directive, TIC54X +@cindex @code{mnolist} directive, TIC54X @item .mlist @item .mnolist Control whether to include macro and loop block expansions in the listing output. Ignored. -@cindex @code{mmregs} directive, C54X +@cindex @code{mmregs} directive, TIC54X @item .mmregs Define global symbolic names for the 'c54x registers. Supposedly equivalent to executing @code{.set} directives for each register with its memory-mapped value, but in reality is provided only for compatibility and does nothing. -@cindex @code{newblock} directive, C54X +@cindex @code{newblock} directive, TIC54X @item .newblock -This directive resets any C54X local labels currently defined. Normal +This directive resets any TIC54X local labels currently defined. Normal @code{@value{AS}} local labels are unaffected. -@cindex @code{option} directive, C54X +@cindex @code{option} directive, TIC54X @item .option @var{option_list} Set listing options. Ignored. -@cindex @code{sblock} directive, C54X +@cindex @code{sblock} directive, TIC54X @item .sblock "@var{section_name}" | @var{section_name} [,"@var{name_n}" | @var{name_n}] Designate @var{section_name} for blocking. Blocking guarantees that a section will start on a page boundary (128 words) if it would otherwise cross a page boundary. Only initialized sections may be designated with -this directive. See also @xref{C54X-Block}. +this directive. See also @xref{TIC54X-Block}. -@cindex @code{sect} directive, C54X +@cindex @code{sect} directive, TIC54X @item .sect "@var{section_name}" Define a named initialized section and make it the current section. -@cindex @code{set} directive, C54X -@cindex @code{equ} directive, C54X +@cindex @code{set} directive, TIC54X +@cindex @code{equ} directive, TIC54X @item @var{symbol} .set "@var{value}" @itemx @var{symbol} .equ "@var{value}" Equate a constant @var{value} to a @var{symbol}, which is placed in the symbol table. @var{symbol} may not be previously defined. -@cindex @code{space} directive, C54X -@cindex @code{bes} directive, C54X +@cindex @code{space} directive, TIC54X +@cindex @code{bes} directive, TIC54X @item .space @var{size_in_bits} @itemx .bes @var{size_in_bits} Reserve the given number of bits in the current section and zero-fill @@ -578,14 +578,14 @@ them. If a label is used with @code{.space}, it points to the @strong{first} word reserved. With @code{.bes}, the label points to the @strong{last} word reserved. -@cindex @code{sslist} directive, C54X -@cindex @code{ssnolist} directive, C54X +@cindex @code{sslist} directive, TIC54X +@cindex @code{ssnolist} directive, TIC54X @item .sslist @itemx .ssnolist Controls the inclusion of subsym replacement in the listing output. Ignored. -@cindex @code{string} directive, C54X -@cindex @code{pstring} directive, C54X +@cindex @code{string} directive, TIC54X +@cindex @code{pstring} directive, TIC54X @item .string "@var{string}" [,...,"@var{string_n}"] @itemx .pstring "@var{string}" [,...,"@var{string_n}"] Place 8-bit characters from @var{string} into the current section. @@ -594,9 +594,9 @@ Place 8-bit characters from @var{string} into the current section. most-significant bits first. Unused space is zero-filled. If a label is used, it points to the first word initialized. -@cindex @code{struct} directive, C54X -@cindex @code{tag} directive, C54X -@cindex @code{endstruct} directive, C54X +@cindex @code{struct} directive, TIC54X +@cindex @code{tag} directive, TIC54X +@cindex @code{endstruct} directive, TIC54X @item [@var{stag}] .struct [@var{offset}] @itemx [@var{name_1}] element [@var{count_1}] @itemx [@var{name_2}] element [@var{count_2}] @@ -629,13 +629,13 @@ structure to a symbol. Once applied to @var{label}, the individual structure elements may be applied to @var{label} to produce the desired offsets using @var{label} as the structure base. -@cindex @code{tab} directive, C54X +@cindex @code{tab} directive, TIC54X @item .tab Set the tab size in the output listing. Ignored. -@cindex @code{union} directive, C54X -@cindex @code{tag} directive, C54X -@cindex @code{endunion} directive, C54X +@cindex @code{union} directive, TIC54X +@cindex @code{tag} directive, TIC54X +@cindex @code{endunion} directive, TIC54X @item [@var{utag}] .union @itemx [@var{name_1}] element [@var{count_1}] @itemx [@var{name_2}] element [@var{count_2}] @@ -648,23 +648,23 @@ Similar to @code{.struct}, but the offset after each element is reset to zero, and the @var{usize} is set to the maximum of all defined elements. Starting offset for the union is always zero. -@cindex @code{usect} directive, C54X +@cindex @code{usect} directive, TIC54X @item [@var{symbol}] .usect "@var{section_name}", @var{size}, [,[@var{blocking_flag}] [,@var{alignment_flag}]] Reserve space for variables in a named, uninitialized section (similar to .bss). @code{.usect} allows definitions sections independent of .bss. @var{symbol} points to the first location reserved by this allocation. The symbol may be used as a variable name. @var{size} is the allocated size in words. @var{blocking_flag} indicates whether to block this -section on a page boundary (128 words) (@pxref{C54X-Block}). +section on a page boundary (128 words) (@pxref{TIC54X-Block}). @var{alignment flag} indicates whether the section should be longword-aligned. -@cindex @code{var} directive, C54X +@cindex @code{var} directive, TIC54X @item .var @var{sym}[,..., @var{sym_n}] Define a subsym to be a local variable within a macro. See -@xref{C54X-Macros}. +@xref{TIC54X-Macros}. -@cindex @code{version} directive, C54X +@cindex @code{version} directive, TIC54X @item .version @var{version} Set which processor to build instructions for. Though the following values are accepted, the op is ignored. @@ -680,11 +680,11 @@ values are accepted, the op is ignored. @end table @end table -@node C54X-Macros +@node TIC54X-Macros @section Macros -@cindex C54X-specific macros -@cindex macros, C54X +@cindex TIC54X-specific macros +@cindex macros, TIC54X Macros do not require explicit dereferencing of arguments (i.e. \ARG). During macro expansion, the macro parameters are converted to subsyms. @@ -694,73 +694,73 @@ equivalent of all remaining arguments. If fewer arguments are given than parameters, the missing parameters are assigned empty strings. To include a comma in an argument, you must enclose the argument in quotes. -@cindex subsym builtins, C54X -@cindex C54X subsym builtins -@cindex builtin subsym functions, C54X +@cindex subsym builtins, TIC54X +@cindex TIC54X subsym builtins +@cindex builtin subsym functions, TIC54X The following built-in subsym functions allow examination of the string value of subsyms (or ordinary strings). The arguments are strings unless otherwise indicated (subsyms passed as args will be replaced by the strings they represent). @table @code -@cindex @code{$symlen} subsym builtin, C54X +@cindex @code{$symlen} subsym builtin, TIC54X @item @code{$symlen(@var{str})} Returns the length of @var{str}. -@cindex @code{$symcmp} subsym builtin, C54X +@cindex @code{$symcmp} subsym builtin, TIC54X @item @code{$symcmp(@var{str1},@var{str2})} Returns 0 if @var{str1} == @var{str2}, non-zero otherwise. -@cindex @code{$firstch} subsym builtin, C54X +@cindex @code{$firstch} subsym builtin, TIC54X @item @code{$firstch(@var{str},@var{ch})} Returns index of the first occurrence of character constant @var{ch} in @var{str}. -@cindex @code{$lastch} subsym builtin, C54X +@cindex @code{$lastch} subsym builtin, TIC54X @item @code{$lastch(@var{str},@var{ch})} Returns index of the last occurrence of character constant @var{ch} in @var{str}. -@cindex @code{$isdefed} subsym builtin, C54X +@cindex @code{$isdefed} subsym builtin, TIC54X @item @code{$isdefed(@var{symbol})} Returns zero if the symbol @var{symbol} is not in the symbol table, non-zero otherwise. -@cindex @code{$ismember} subsym builtin, C54X +@cindex @code{$ismember} subsym builtin, TIC54X @item @code{$ismember(@var{symbol},@var{list})} Assign the first member of comma-separated string @var{list} to @var{symbol}; @var{list} is reassigned the remainder of the list. Returns zero if @var{list} is a null string. Both arguments must be subsyms. -@cindex @code{$iscons} subsym builtin, C54X +@cindex @code{$iscons} subsym builtin, TIC54X @item @code{$iscons(@var{expr})} Returns 1 if string @var{expr} is binary, 2 if octal, 3 if hexadecimal, 4 if a character, 5 if decimal, and zero if not an integer. -@cindex @code{$isname} subsym builtin, C54X +@cindex @code{$isname} subsym builtin, TIC54X @item @code{$isname(@var{name})} Returns 1 if @var{name} is a valid symbol name, zero otherwise. -@cindex @code{$isreg} subsym builtin, C54X +@cindex @code{$isreg} subsym builtin, TIC54X @item @code{$isreg(@var{reg})} Returns 1 if @var{reg} is a valid predefined register name (AR0-AR7 only). -@cindex @code{$structsz} subsym builtin, C54X +@cindex @code{$structsz} subsym builtin, TIC54X @item @code{$structsz(@var{stag})} Returns the size of the structure or union represented by @var{stag}. -@cindex @code{$structacc} subsym builtin, C54X +@cindex @code{$structacc} subsym builtin, TIC54X @item @code{$structacc(@var{stag})} Returns the reference point of the structure or union represented by @var{stag}. Always returns zero. @end table -@node C54X-MMRegs +@node TIC54X-MMRegs @section Memory-mapped Registers -@cindex C54X memory-mapped registers -@cindex registers, C54X memory-mapped -@cindex memory-mapped registers, C54X +@cindex TIC54X memory-mapped registers +@cindex registers, TIC54X memory-mapped +@cindex memory-mapped registers, TIC54X The following symbols are recognized as memory-mapped registers: @table @code diff --git a/gas/testsuite/gas/arm/maverick.s b/gas/testsuite/gas/arm/maverick.s index dd56899049e..cb6c4712fef 100644 --- a/gas/testsuite/gas/arm/maverick.s +++ b/gas/testsuite/gas/arm/maverick.s @@ -1,470 +1,470 @@ .text .align load_store: - cfldrseq mvf5, [sp, #255] - cfldrsmi mvf14, [r11, #73] - cfldrsvc mvf2, [r12, #-239] - cfldrslt mvf0, [r10, #-255] - cfldrscc mvf12, [r1, #-39] - cfldrs mvf13, [r15, #104]! - cfldrscs mvf9, [r0, #-0]! - cfldrsge mvf9, [lr, #72]! - cfldrshi mvf13, [r5, #37]! - cfldrsgt mvf6, [r3, #0]! - cfldrspl mvf14, [r4], #64 - cfldrsne mvf8, [r2], #-157 - cfldrslt mvf4, [r9], #1 - cfldrspl mvf15, [r7], #-63 - cfldrsal mvf3, [r8], #-136 - cfldrdcs mvd1, [r6, #-68] - cfldrdeq mvd7, [r13, #255] - cfldrdgt mvd10, [r11, #73] - cfldrdle mvd6, [r12, #-239] - cfldrdls mvd0, [r10, #-255] - cfldrdls mvd4, [r1, #-39]! - cfldrdle mvd7, [pc, #104]! - cfldrdvs mvd11, [r0, #-0]! - cfldrdal mvd3, [r14, #72]! - cfldrdhi mvd15, [r5, #37]! - cfldrdmi mvd2, [r3], #0 - cfldrd mvd10, [r4], #64 - cfldrdcc mvd8, [r2], #-157 - cfldrdne mvd12, [r9], #1 - cfldrdvc mvd5, [r7], #-63 - cfldr32ge mvfx1, [r8, #-136] - cfldr32vs mvfx11, [r6, #-68] - cfldr32eq mvfx5, [sp, #255] - cfldr32mi mvfx14, [r11, #73] - cfldr32vc mvfx2, [r12, #-239] - cfldr32lt mvfx0, [r10, #-255]! - cfldr32cc mvfx12, [r1, #-39]! - cfldr32 mvfx13, [r15, #104]! - cfldr32cs mvfx9, [r0, #-0]! - cfldr32ge mvfx9, [lr, #72]! - cfldr32hi mvfx13, [r5], #37 - cfldr32gt mvfx6, [r3], #0 - cfldr32pl mvfx14, [r4], #64 - cfldr32ne mvfx8, [r2], #-157 - cfldr32lt mvfx4, [r9], #1 - cfldr64pl mvdx15, [r7, #-63] - cfldr64al mvdx3, [r8, #-136] - cfldr64cs mvdx1, [r6, #-68] - cfldr64eq mvdx7, [r13, #255] - cfldr64gt mvdx10, [r11, #73] - cfldr64le mvdx6, [r12, #-239]! - cfldr64ls mvdx0, [r10, #-255]! - cfldr64ls mvdx4, [r1, #-39]! - cfldr64le mvdx7, [pc, #104]! - cfldr64vs mvdx11, [r0, #-0]! - cfldr64al mvdx3, [r14], #72 - cfldr64hi mvdx15, [r5], #37 - cfldr64mi mvdx2, [r3], #0 - cfldr64 mvdx10, [r4], #64 - cfldr64cc mvdx8, [r2], #-157 - cfstrsne mvf12, [r9, #1] - cfstrsvc mvf5, [r7, #-63] - cfstrsge mvf1, [r8, #-136] - cfstrsvs mvf11, [r6, #-68] - cfstrseq mvf5, [sp, #255] - cfstrsmi mvf14, [r11, #73]! - cfstrsvc mvf2, [r12, #-239]! - cfstrslt mvf0, [r10, #-255]! - cfstrscc mvf12, [r1, #-39]! - cfstrs mvf13, [r15, #104]! - cfstrscs mvf9, [r0], #-0 - cfstrsge mvf9, [lr], #72 - cfstrshi mvf13, [r5], #37 - cfstrsgt mvf6, [r3], #0 - cfstrspl mvf14, [r4], #64 - cfstrdne mvd8, [r2, #-157] - cfstrdlt mvd4, [r9, #1] - cfstrdpl mvd15, [r7, #-63] - cfstrdal mvd3, [r8, #-136] - cfstrdcs mvd1, [r6, #-68] - cfstrdeq mvd7, [r13, #255]! - cfstrdgt mvd10, [r11, #73]! - cfstrdle mvd6, [r12, #-239]! - cfstrdls mvd0, [r10, #-255]! - cfstrdls mvd4, [r1, #-39]! - cfstrdle mvd7, [pc], #104 - cfstrdvs mvd11, [r0], #-0 - cfstrdal mvd3, [r14], #72 - cfstrdhi mvd15, [r5], #37 - cfstrdmi mvd2, [r3], #0 - cfstr32 mvfx10, [r4, #64] - cfstr32cc mvfx8, [r2, #-157] - cfstr32ne mvfx12, [r9, #1] - cfstr32vc mvfx5, [r7, #-63] - cfstr32ge mvfx1, [r8, #-136] - cfstr32vs mvfx11, [r6, #-68]! - cfstr32eq mvfx5, [sp, #255]! - cfstr32mi mvfx14, [r11, #73]! - cfstr32vc mvfx2, [r12, #-239]! - cfstr32lt mvfx0, [r10, #-255]! - cfstr32cc mvfx12, [r1], #-39 - cfstr32 mvfx13, [r15], #104 - cfstr32cs mvfx9, [r0], #-0 - cfstr32ge mvfx9, [lr], #72 - cfstr32hi mvfx13, [r5], #37 - cfstr64gt mvdx6, [r3, #0] - cfstr64pl mvdx14, [r4, #64] - cfstr64ne mvdx8, [r2, #-157] - cfstr64lt mvdx4, [r9, #1] - cfstr64pl mvdx15, [r7, #-63] - cfstr64al mvdx3, [r8, #-136]! - cfstr64cs mvdx1, [r6, #-68]! - cfstr64eq mvdx7, [r13, #255]! - cfstr64gt mvdx10, [r11, #73]! - cfstr64le mvdx6, [r12, #-239]! - cfstr64ls mvdx0, [r10], #-255 - cfstr64ls mvdx4, [r1], #-39 - cfstr64le mvdx7, [pc], #104 - cfstr64vs mvdx11, [r0], #-0 - cfstr64al mvdx3, [r14], #72 + cfldrseq mvf5, [sp, #252] + cfldrsmi mvf14, [r11, #72] + cfldrsvc mvf2, [r12, #-240] + cfldrslt mvf0, [sl, #252] + cfldrsgt mvf10, [fp, #72] + cfldrsle mvf6, [ip, #-240]! + cfldrsls mvf0, [r10, #252]! + cfldrsmi mvf14, [r11, #72]! + cfldrsvc mvf2, [r12, #-240]! + cfldrslt mvf0, [sl, #252]! + cfldrsgt mvf10, [fp], #72 + cfldrsle mvf6, [ip], #-240 + cfldrsls mvf0, [r10], #252 + cfldrsmi mvf14, [r11], #72 + cfldrsvc mvf2, [r12], #-240 + cfldrdlt mvd0, [sl, #252] + cfldrdgt mvd10, [fp, #72] + cfldrdle mvd6, [ip, #-240] + cfldrdls mvd0, [r10, #252] + cfldrdmi mvd14, [r11, #72] + cfldrdvc mvd2, [r12, #-240]! + cfldrdlt mvd0, [sl, #252]! + cfldrdgt mvd10, [fp, #72]! + cfldrdle mvd6, [ip, #-240]! + cfldrdls mvd0, [r10, #252]! + cfldrdmi mvd14, [r11], #72 + cfldrdvc mvd2, [r12], #-240 + cfldrdlt mvd0, [sl], #252 + cfldrdgt mvd10, [fp], #72 + cfldrdle mvd6, [ip], #-240 + cfldr32ls mvfx0, [r10, #252] + cfldr32mi mvfx14, [r11, #72] + cfldr32vc mvfx2, [r12, #-240] + cfldr32lt mvfx0, [sl, #252] + cfldr32gt mvfx10, [fp, #72] + cfldr32le mvfx6, [ip, #-240]! + cfldr32ls mvfx0, [r10, #252]! + cfldr32mi mvfx14, [r11, #72]! + cfldr32vc mvfx2, [r12, #-240]! + cfldr32lt mvfx0, [sl, #252]! + cfldr32gt mvfx10, [fp], #72 + cfldr32le mvfx6, [ip], #-240 + cfldr32ls mvfx0, [r10], #252 + cfldr32mi mvfx14, [r11], #72 + cfldr32vc mvfx2, [r12], #-240 + cfldr64lt mvdx0, [sl, #252] + cfldr64gt mvdx10, [fp, #72] + cfldr64le mvdx6, [ip, #-240] + cfldr64ls mvdx0, [r10, #252] + cfldr64mi mvdx14, [r11, #72] + cfldr64vc mvdx2, [r12, #-240]! + cfldr64lt mvdx0, [sl, #252]! + cfldr64gt mvdx10, [fp, #72]! + cfldr64le mvdx6, [ip, #-240]! + cfldr64ls mvdx0, [r10, #252]! + cfldr64mi mvdx14, [r11], #72 + cfldr64vc mvdx2, [r12], #-240 + cfldr64lt mvdx0, [sl], #252 + cfldr64gt mvdx10, [fp], #72 + cfldr64le mvdx6, [ip], #-240 + cfstrsls mvf0, [r10, #252] + cfstrsmi mvf14, [r11, #72] + cfstrsvc mvf2, [r12, #-240] + cfstrslt mvf0, [sl, #252] + cfstrsgt mvf10, [fp, #72] + cfstrsle mvf6, [ip, #-240]! + cfstrsls mvf0, [r10, #252]! + cfstrsmi mvf14, [r11, #72]! + cfstrsvc mvf2, [r12, #-240]! + cfstrslt mvf0, [sl, #252]! + cfstrsgt mvf10, [fp], #72 + cfstrsle mvf6, [ip], #-240 + cfstrsls mvf0, [r10], #252 + cfstrsmi mvf14, [r11], #72 + cfstrsvc mvf2, [r12], #-240 + cfstrdlt mvd0, [sl, #252] + cfstrdgt mvd10, [fp, #72] + cfstrdle mvd6, [ip, #-240] + cfstrdls mvd0, [r10, #252] + cfstrdmi mvd14, [r11, #72] + cfstrdvc mvd2, [r12, #-240]! + cfstrdlt mvd0, [sl, #252]! + cfstrdgt mvd10, [fp, #72]! + cfstrdle mvd6, [ip, #-240]! + cfstrdls mvd0, [r10, #252]! + cfstrdmi mvd14, [r11], #72 + cfstrdvc mvd2, [r12], #-240 + cfstrdlt mvd0, [sl], #252 + cfstrdgt mvd10, [fp], #72 + cfstrdle mvd6, [ip], #-240 + cfstr32ls mvfx0, [r10, #252] + cfstr32mi mvfx14, [r11, #72] + cfstr32vc mvfx2, [r12, #-240] + cfstr32lt mvfx0, [sl, #252] + cfstr32gt mvfx10, [fp, #72] + cfstr32le mvfx6, [ip, #-240]! + cfstr32ls mvfx0, [r10, #252]! + cfstr32mi mvfx14, [r11, #72]! + cfstr32vc mvfx2, [r12, #-240]! + cfstr32lt mvfx0, [sl, #252]! + cfstr32gt mvfx10, [fp], #72 + cfstr32le mvfx6, [ip], #-240 + cfstr32ls mvfx0, [r10], #252 + cfstr32mi mvfx14, [r11], #72 + cfstr32vc mvfx2, [r12], #-240 + cfstr64lt mvdx0, [sl, #252] + cfstr64gt mvdx10, [fp, #72] + cfstr64le mvdx6, [ip, #-240] + cfstr64ls mvdx0, [r10, #252] + cfstr64mi mvdx14, [r11, #72] + cfstr64vc mvdx2, [r12, #-240]! + cfstr64lt mvdx0, [sl, #252]! + cfstr64gt mvdx10, [fp, #72]! + cfstr64le mvdx6, [ip, #-240]! + cfstr64ls mvdx0, [r10, #252]! + cfstr64mi mvdx14, [r11], #72 + cfstr64vc mvdx2, [r12], #-240 + cfstr64lt mvdx0, [sl], #252 + cfstr64gt mvdx10, [fp], #72 + cfstr64le mvdx6, [ip], #-240 move: - cfmvsrhi mvf15, r5 - cfmvsrvs mvf11, r6 - cfmvsrcs mvf9, r0 - cfmvsrpl mvf15, r7 - cfmvsrls mvf4, r1 - cfmvrscc r8, mvf13 - cfmvrsvc pc, mvf1 - cfmvrsgt r9, mvf11 - cfmvrseq r10, mvf5 - cfmvrsal r4, mvf12 - cfmvdlrge mvd1, r8 - cfmvdlr mvd13, r15 - cfmvdlrlt mvd4, r9 - cfmvdlrls mvd0, r10 - cfmvdlr mvd10, r4 - cfmvrdlmi r1, mvd3 - cfmvrdlhi r2, mvd7 - cfmvrdlcs r12, mvd12 - cfmvrdlvs r3, mvd0 - cfmvrdlvc r13, mvd14 - cfmvdhrcc mvd12, r1 - cfmvdhrne mvd8, r2 - cfmvdhrle mvd6, r12 - cfmvdhrmi mvd2, r3 - cfmvdhreq mvd5, sp - cfmvrdhge r4, mvd4 - cfmvrdhal r11, mvd8 - cfmvrdhle r5, mvd2 - cfmvrdhne r6, mvd6 - cfmvrdhlt r0, mvd7 - cfmv64lrpl mvdx14, r4 - cfmv64lrgt mvdx10, r11 - cfmv64lrhi mvdx15, r5 - cfmv64lrvs mvdx11, r6 - cfmv64lrcs mvdx9, r0 - cfmvr64lpl sp, mvdx10 - cfmvr64lls lr, mvdx14 - cfmvr64lcc r8, mvdx13 - cfmvr64lvc pc, mvdx1 - cfmvr64lgt r9, mvdx11 - cfmv64hreq mvdx7, r13 - cfmv64hral mvdx3, r14 - cfmv64hrge mvdx1, r8 - cfmv64hr mvdx13, r15 - cfmv64hrlt mvdx4, r9 - cfmvr64hls r0, mvdx5 - cfmvr64h r7, mvdx9 - cfmvr64hmi r1, mvdx3 - cfmvr64hhi r2, mvdx7 - cfmvr64hcs r12, mvdx12 - cfmval32vs mvax1, mvfx0 - cfmval32vc mvax3, mvfx14 - cfmval32cc mvax0, mvfx10 - cfmval32ne mvax1, mvfx15 - cfmval32le mvax0, mvfx11 - cfmv32almi mvfx2, mvax1 - cfmv32aleq mvfx5, mvax3 - cfmv32alge mvfx9, mvax0 - cfmv32alal mvfx3, mvax1 - cfmv32alle mvfx7, mvax0 - cfmvam32ne mvax2, mvfx6 - cfmvam32lt mvax0, mvfx7 - cfmvam32pl mvax2, mvfx3 - cfmvam32gt mvax1, mvfx1 - cfmvam32hi mvax3, mvfx13 - cfmv32amvs mvfx11, mvax2 - cfmv32amcs mvfx9, mvax0 - cfmv32ampl mvfx15, mvax2 - cfmv32amls mvfx4, mvax1 - cfmv32amcc mvfx8, mvax3 - cfmvah32vc mvax0, mvfx1 - cfmvah32gt mvax0, mvfx11 - cfmvah32eq mvax1, mvfx5 - cfmvah32al mvax2, mvfx12 - cfmvah32ge mvax3, mvfx8 - cfmv32ah mvfx13, mvax0 - cfmv32ahlt mvfx4, mvax0 - cfmv32ahls mvfx0, mvax1 - cfmv32ah mvfx10, mvax2 - cfmv32ahmi mvfx14, mvax3 - cfmva32hi mvax3, mvfx7 - cfmva32cs mvax3, mvfx12 - cfmva32vs mvax1, mvfx0 - cfmva32vc mvax3, mvfx14 - cfmva32cc mvax0, mvfx10 - cfmv32ane mvfx8, mvax3 - cfmv32ale mvfx6, mvax3 - cfmv32ami mvfx2, mvax1 - cfmv32aeq mvfx5, mvax3 - cfmv32age mvfx9, mvax0 - cfmva64al mvax3, mvdx8 - cfmva64le mvax2, mvdx2 - cfmva64ne mvax2, mvdx6 - cfmva64lt mvax0, mvdx7 - cfmva64pl mvax2, mvdx3 - cfmv64agt mvdx10, mvax3 - cfmv64ahi mvdx15, mvax2 - cfmv64avs mvdx11, mvax2 - cfmv64acs mvdx9, mvax0 - cfmv64apl mvdx15, mvax2 - cfmvsc32ls dspsc, mvfx14 - cfmvsc32cc dspsc, mvfx13 - cfmvsc32vc dspsc, mvfx1 - cfmvsc32gt dspsc, mvfx11 - cfmvsc32eq dspsc, mvfx5 + cfmvsrls mvf0, r10 + cfmvsr mvf10, r4 + cfmvsrmi mvf14, r11 + cfmvsrhi mvf13, r5 + cfmvsrcs mvf1, r6 + cfmvrsvs r3, mvf0 + cfmvrsvc r13, mvf14 + cfmvrscc r14, mvf10 + cfmvrsne r8, mvf15 + cfmvrsle r15, mvf11 + cfmvdlrmi mvd2, r3 + cfmvdlreq mvd5, sp + cfmvdlrge mvd9, lr + cfmvdlral mvd3, r8 + cfmvdlrle mvd7, pc + cfmvrdlne r6, mvd6 + cfmvrdllt r0, mvd7 + cfmvrdlpl r7, mvd3 + cfmvrdlgt r1, mvd1 + cfmvrdlhi r2, mvd13 + cfmvdhrvs mvd11, r6 + cfmvdhrcs mvd9, r0 + cfmvdhrpl mvd15, r7 + cfmvdhrls mvd4, r1 + cfmvdhrcc mvd8, r2 + cfmvrdhvc pc, mvd1 + cfmvrdhgt r9, mvd11 + cfmvrdheq sl, mvd5 + cfmvrdhal r4, mvd12 + cfmvrdhge fp, mvd8 + cfmv64lr mvdx13, r15 + cfmv64lrlt mvdx4, r9 + cfmv64lrls mvdx0, r10 + cfmv64lr mvdx10, r4 + cfmv64lrmi mvdx14, r11 + cfmvr64lhi r2, mvdx7 + cfmvr64lcs r12, mvdx12 + cfmvr64lvs r3, mvdx0 + cfmvr64lvc r13, mvdx14 + cfmvr64lcc r14, mvdx10 + cfmv64hrne mvdx8, r2 + cfmv64hrle mvdx6, ip + cfmv64hrmi mvdx2, r3 + cfmv64hreq mvdx5, sp + cfmv64hrge mvdx9, lr + cfmvr64hal r11, mvdx8 + cfmvr64hle r5, mvdx2 + cfmvr64hne r6, mvdx6 + cfmvr64hlt r0, mvdx7 + cfmvr64hpl r7, mvdx3 + cfmval32gt mvax1, mvfx1 + cfmval32hi mvax3, mvfx13 + cfmval32vs mvax3, mvfx4 + cfmval32cs mvax1, mvfx0 + cfmval32pl mvax3, mvfx10 + cfmv32alls mvfx4, mvax1 + cfmv32alcc mvfx8, mvax3 + cfmv32alvc mvfx2, mvax3 + cfmv32algt mvfx6, mvax1 + cfmv32aleq mvfx7, mvax3 + cfmvam32al mvax2, mvfx12 + cfmvam32ge mvax3, mvfx8 + cfmvam32 mvax2, mvfx6 + cfmvam32lt mvax2, mvfx2 + cfmvam32ls mvax0, mvfx5 + cfmv32am mvfx10, mvax2 + cfmv32ammi mvfx14, mvax3 + cfmv32amhi mvfx13, mvax2 + cfmv32amcs mvfx1, mvax2 + cfmv32amvs mvfx11, mvax0 + cfmvah32vc mvax3, mvfx14 + cfmvah32cc mvax0, mvfx10 + cfmvah32ne mvax1, mvfx15 + cfmvah32le mvax0, mvfx11 + cfmvah32mi mvax0, mvfx9 + cfmv32aheq mvfx5, mvax3 + cfmv32ahge mvfx9, mvax0 + cfmv32ahal mvfx3, mvax1 + cfmv32ahle mvfx7, mvax0 + cfmv32ahne mvfx12, mvax0 + cfmva32lt mvax0, mvfx7 + cfmva32pl mvax2, mvfx3 + cfmva32gt mvax1, mvfx1 + cfmva32hi mvax3, mvfx13 + cfmva32vs mvax3, mvfx4 + cfmv32acs mvfx9, mvax0 + cfmv32apl mvfx15, mvax2 + cfmv32als mvfx4, mvax1 + cfmv32acc mvfx8, mvax3 + cfmv32avc mvfx2, mvax3 + cfmva64gt mvax0, mvdx11 + cfmva64eq mvax1, mvdx5 + cfmva64al mvax2, mvdx12 + cfmva64ge mvax3, mvdx8 + cfmva64 mvax2, mvdx6 + cfmv64alt mvdx4, mvax0 + cfmv64als mvdx0, mvax1 + cfmv64a mvdx10, mvax2 + cfmv64ami mvdx14, mvax3 + cfmv64ahi mvdx13, mvax2 + cfmvsc32cs dspsc, mvfx12 + cfmvsc32vs dspsc, mvfx0 + cfmvsc32vc dspsc, mvfx14 + cfmvsc32cc dspsc, mvfx10 + cfmvsc32ne dspsc, mvfx15 + cfmv32scle mvfx6, dspsc + cfmv32scmi mvfx2, dspsc + cfmv32sceq mvfx5, dspsc + cfmv32scge mvfx9, dspsc cfmv32scal mvfx3, dspsc - cfmv32scge mvfx1, dspsc - cfmv32sc mvfx13, dspsc - cfmv32sclt mvfx4, dspsc - cfmv32scls mvfx0, dspsc - cfcpys mvf10, mvf9 - cfcpysmi mvf14, mvf3 - cfcpyshi mvf13, mvf7 - cfcpyscs mvf1, mvf12 - cfcpysvs mvf11, mvf0 - cfcpydvc mvd5, mvd14 - cfcpydcc mvd12, mvd10 - cfcpydne mvd8, mvd15 - cfcpydle mvd6, mvd11 - cfcpydmi mvd2, mvd9 + cfcpysle mvf7, mvf2 + cfcpysne mvf12, mvf6 + cfcpyslt mvf0, mvf7 + cfcpyspl mvf14, mvf3 + cfcpysgt mvf10, mvf1 + cfcpydhi mvd15, mvd13 + cfcpydvs mvd11, mvd4 + cfcpydcs mvd9, mvd0 + cfcpydpl mvd15, mvd10 + cfcpydls mvd4, mvd14 conv: - cfcvtsdeq mvd5, mvf15 - cfcvtsdge mvd9, mvf4 - cfcvtsdal mvd3, mvf8 - cfcvtsdle mvd7, mvf2 - cfcvtsdne mvd12, mvf6 - cfcvtdslt mvf0, mvd7 - cfcvtdspl mvf14, mvd3 - cfcvtdsgt mvf10, mvd1 - cfcvtdshi mvf15, mvd13 - cfcvtdsvs mvf11, mvd4 - cfcvt32scs mvf9, mvfx0 - cfcvt32spl mvf15, mvfx10 - cfcvt32sls mvf4, mvfx14 - cfcvt32scc mvf8, mvfx13 - cfcvt32svc mvf2, mvfx1 - cfcvt32dgt mvd6, mvfx11 - cfcvt32deq mvd7, mvfx5 - cfcvt32dal mvd3, mvfx12 - cfcvt32dge mvd1, mvfx8 - cfcvt32d mvd13, mvfx6 - cfcvt64slt mvf4, mvdx2 - cfcvt64sls mvf0, mvdx5 - cfcvt64s mvf10, mvdx9 - cfcvt64smi mvf14, mvdx3 - cfcvt64shi mvf13, mvdx7 - cfcvt64dcs mvd1, mvdx12 - cfcvt64dvs mvd11, mvdx0 - cfcvt64dvc mvd5, mvdx14 - cfcvt64dcc mvd12, mvdx10 - cfcvt64dne mvd8, mvdx15 - cfcvts32le mvfx6, mvf11 - cfcvts32mi mvfx2, mvf9 - cfcvts32eq mvfx5, mvf15 - cfcvts32ge mvfx9, mvf4 - cfcvts32al mvfx3, mvf8 - cfcvtd32le mvfx7, mvd2 - cfcvtd32ne mvfx12, mvd6 - cfcvtd32lt mvfx0, mvd7 - cfcvtd32pl mvfx14, mvd3 - cfcvtd32gt mvfx10, mvd1 - cftruncs32hi mvfx15, mvf13 - cftruncs32vs mvfx11, mvf4 - cftruncs32cs mvfx9, mvf0 - cftruncs32pl mvfx15, mvf10 - cftruncs32ls mvfx4, mvf14 - cftruncd32cc mvfx8, mvd13 - cftruncd32vc mvfx2, mvd1 - cftruncd32gt mvfx6, mvd11 - cftruncd32eq mvfx7, mvd5 - cftruncd32al mvfx3, mvd12 + cfcvtsdcc mvd8, mvf13 + cfcvtsdvc mvd2, mvf1 + cfcvtsdgt mvd6, mvf11 + cfcvtsdeq mvd7, mvf5 + cfcvtsdal mvd3, mvf12 + cfcvtdsge mvf1, mvd8 + cfcvtds mvf13, mvd6 + cfcvtdslt mvf4, mvd2 + cfcvtdsls mvf0, mvd5 + cfcvtds mvf10, mvd9 + cfcvt32smi mvf14, mvfx3 + cfcvt32shi mvf13, mvfx7 + cfcvt32scs mvf1, mvfx12 + cfcvt32svs mvf11, mvfx0 + cfcvt32svc mvf5, mvfx14 + cfcvt32dcc mvd12, mvfx10 + cfcvt32dne mvd8, mvfx15 + cfcvt32dle mvd6, mvfx11 + cfcvt32dmi mvd2, mvfx9 + cfcvt32deq mvd5, mvfx15 + cfcvt64sge mvf9, mvdx4 + cfcvt64sal mvf3, mvdx8 + cfcvt64sle mvf7, mvdx2 + cfcvt64sne mvf12, mvdx6 + cfcvt64slt mvf0, mvdx7 + cfcvt64dpl mvd14, mvdx3 + cfcvt64dgt mvd10, mvdx1 + cfcvt64dhi mvd15, mvdx13 + cfcvt64dvs mvd11, mvdx4 + cfcvt64dcs mvd9, mvdx0 + cfcvts32pl mvfx15, mvf10 + cfcvts32ls mvfx4, mvf14 + cfcvts32cc mvfx8, mvf13 + cfcvts32vc mvfx2, mvf1 + cfcvts32gt mvfx6, mvf11 + cfcvtd32eq mvfx7, mvd5 + cfcvtd32al mvfx3, mvd12 + cfcvtd32ge mvfx1, mvd8 + cfcvtd32 mvfx13, mvd6 + cfcvtd32lt mvfx4, mvd2 + cftruncs32ls mvfx0, mvf5 + cftruncs32 mvfx10, mvf9 + cftruncs32mi mvfx14, mvf3 + cftruncs32hi mvfx13, mvf7 + cftruncs32cs mvfx1, mvf12 + cftruncd32vs mvfx11, mvd0 + cftruncd32vc mvfx5, mvd14 + cftruncd32cc mvfx12, mvd10 + cftruncd32ne mvfx8, mvd15 + cftruncd32le mvfx6, mvd11 shift: - cfrshl32ge mvfx1, mvfx8, r2 - cfrshl32vs mvfx11, mvfx4, r9 - cfrshl32eq mvfx5, mvfx15, r7 - cfrshl32mi mvfx14, mvfx3, r8 - cfrshl32vc mvfx2, mvfx1, r6 - cfrshl64lt mvdx0, mvdx7, r13 - cfrshl64cc mvdx12, mvdx10, r11 - cfrshl64 mvdx13, mvdx6, r12 - cfrshl64cs mvdx9, mvdx0, r10 - cfrshl64ge mvdx9, mvdx4, r1 - cfsh32hi mvfx13, mvfx7, #33 - cfsh32gt mvfx6, mvfx11, #0 - cfsh32pl mvfx14, mvfx3, #32 - cfsh32ne mvfx8, mvfx15, #-31 - cfsh32lt mvfx4, mvfx2, #1 - cfsh64pl mvdx15, mvdx10, #-32 - cfsh64al mvdx3, mvdx8, #-27 - cfsh64cs mvdx1, mvdx12, #-5 - cfsh64eq mvdx7, mvdx5, #63 - cfsh64gt mvdx10, mvdx1, #9 + cfrshl32mi mvfx2, mvfx9, r0 + cfrshl32 mvfx10, mvfx9, lr + cfrshl32cc mvfx8, mvfx13, r5 + cfrshl32ne mvfx12, mvfx6, r3 + cfrshl32vc mvfx5, mvfx14, r4 + cfrshl64ge mvdx1, mvdx8, r2 + cfrshl64vs mvdx11, mvdx4, r9 + cfrshl64eq mvdx5, mvdx15, r7 + cfrshl64mi mvdx14, mvdx3, r8 + cfrshl64vc mvdx2, mvdx1, r6 + cfsh32lt mvfx0, mvfx7, #-64 + cfsh32cc mvfx12, mvfx10, #-20 + cfsh32 mvfx13, mvfx6, #40 + cfsh32cs mvfx9, mvfx0, #-1 + cfsh32ge mvfx9, mvfx4, #24 + cfsh64hi mvdx13, mvdx7, #33 + cfsh64gt mvdx6, mvdx11, #0 + cfsh64pl mvdx14, mvdx3, #32 + cfsh64ne mvdx8, mvdx15, #-31 + cfsh64lt mvdx4, mvdx2, #1 comp: - cfcmpsle r15, mvf11, mvf4 - cfcmpsls r0, mvf5, mvf15 - cfcmpsls lr, mvf14, mvf3 - cfcmpsle r5, mvf2, mvf1 - cfcmpsvs r3, mvf0, mvf7 - cfcmpdal r4, mvd12, mvd10 - cfcmpdhi r2, mvd13, mvd6 - cfcmpdmi r9, mvd9, mvd0 - cfcmpd r7, mvd9, mvd4 - cfcmpdcc r8, mvd13, mvd7 - cfcmp32ne r6, mvfx6, mvfx11 - cfcmp32vc r13, mvfx14, mvfx3 - cfcmp32ge r11, mvfx8, mvfx15 - cfcmp32vs r12, mvfx4, mvfx2 - cfcmp32eq r10, mvfx15, mvfx10 - cfcmp64mi r1, mvdx3, mvdx8 - cfcmp64vc pc, mvdx1, mvdx12 - cfcmp64lt r0, mvdx7, mvdx5 - cfcmp64cc r14, mvdx10, mvdx1 - cfcmp64 r5, mvdx6, mvdx11 + cfcmpspl sp, mvf10, mvf9 + cfcmpsal r11, mvf8, mvf13 + cfcmpscs r12, mvf12, mvf6 + cfcmpseq sl, mvf5, mvf14 + cfcmpsgt r1, mvf1, mvf8 + cfcmpdle r15, mvd11, mvd4 + cfcmpdls r0, mvd5, mvd15 + cfcmpdls lr, mvd14, mvd3 + cfcmpdle r5, mvd2, mvd1 + cfcmpdvs r3, mvd0, mvd7 + cfcmp32al r4, mvfx12, mvfx10 + cfcmp32hi r2, mvfx13, mvfx6 + cfcmp32mi r9, mvfx9, mvfx0 + cfcmp32 r7, mvfx9, mvfx4 + cfcmp32cc r8, mvfx13, mvfx7 + cfcmp64ne r6, mvdx6, mvdx11 + cfcmp64vc r13, mvdx14, mvdx3 + cfcmp64ge fp, mvdx8, mvdx15 + cfcmp64vs ip, mvdx4, mvdx2 + cfcmp64eq r10, mvdx15, mvdx10 fp_arith: - cfabsscs mvf9, mvf0 - cfabsspl mvf15, mvf10 - cfabssls mvf4, mvf14 - cfabsscc mvf8, mvf13 - cfabssvc mvf2, mvf1 - cfabsdgt mvd6, mvd11 - cfabsdeq mvd7, mvd5 - cfabsdal mvd3, mvd12 - cfabsdge mvd1, mvd8 - cfabsd mvd13, mvd6 - cfnegslt mvf4, mvf2 - cfnegsls mvf0, mvf5 - cfnegs mvf10, mvf9 - cfnegsmi mvf14, mvf3 - cfnegshi mvf13, mvf7 - cfnegdcs mvd1, mvd12 - cfnegdvs mvd11, mvd0 - cfnegdvc mvd5, mvd14 - cfnegdcc mvd12, mvd10 - cfnegdne mvd8, mvd15 - cfaddsle mvf6, mvf11, mvf4 - cfaddsls mvf0, mvf5, mvf15 - cfaddsls mvf4, mvf14, mvf3 - cfaddsle mvf7, mvf2, mvf1 - cfaddsvs mvf11, mvf0, mvf7 - cfadddal mvd3, mvd12, mvd10 - cfadddhi mvd15, mvd13, mvd6 - cfadddmi mvd2, mvd9, mvd0 - cfaddd mvd10, mvd9, mvd4 - cfadddcc mvd8, mvd13, mvd7 - cfsubsne mvf12, mvf6, mvf11 - cfsubsvc mvf5, mvf14, mvf3 - cfsubsge mvf1, mvf8, mvf15 - cfsubsvs mvf11, mvf4, mvf2 - cfsubseq mvf5, mvf15, mvf10 - cfsubdmi mvd14, mvd3, mvd8 - cfsubdvc mvd2, mvd1, mvd12 - cfsubdlt mvd0, mvd7, mvd5 - cfsubdcc mvd12, mvd10, mvd1 - cfsubd mvd13, mvd6, mvd11 - cfmulscs mvf9, mvf0, mvf5 - cfmulsge mvf9, mvf4, mvf14 - cfmulshi mvf13, mvf7, mvf2 - cfmulsgt mvf6, mvf11, mvf0 - cfmulspl mvf14, mvf3, mvf12 - cfmuldne mvd8, mvd15, mvd13 - cfmuldlt mvd4, mvd2, mvd9 - cfmuldpl mvd15, mvd10, mvd9 - cfmuldal mvd3, mvd8, mvd13 - cfmuldcs mvd1, mvd12, mvd6 + cfabssmi mvf14, mvf3 + cfabsshi mvf13, mvf7 + cfabsscs mvf1, mvf12 + cfabssvs mvf11, mvf0 + cfabssvc mvf5, mvf14 + cfabsdcc mvd12, mvd10 + cfabsdne mvd8, mvd15 + cfabsdle mvd6, mvd11 + cfabsdmi mvd2, mvd9 + cfabsdeq mvd5, mvd15 + cfnegsge mvf9, mvf4 + cfnegsal mvf3, mvf8 + cfnegsle mvf7, mvf2 + cfnegsne mvf12, mvf6 + cfnegslt mvf0, mvf7 + cfnegdpl mvd14, mvd3 + cfnegdgt mvd10, mvd1 + cfnegdhi mvd15, mvd13 + cfnegdvs mvd11, mvd4 + cfnegdcs mvd9, mvd0 + cfaddspl mvf15, mvf10, mvf9 + cfaddsal mvf3, mvf8, mvf13 + cfaddscs mvf1, mvf12, mvf6 + cfaddseq mvf7, mvf5, mvf14 + cfaddsgt mvf10, mvf1, mvf8 + cfadddle mvd6, mvd11, mvd4 + cfadddls mvd0, mvd5, mvd15 + cfadddls mvd4, mvd14, mvd3 + cfadddle mvd7, mvd2, mvd1 + cfadddvs mvd11, mvd0, mvd7 + cfsubsal mvf3, mvf12, mvf10 + cfsubshi mvf15, mvf13, mvf6 + cfsubsmi mvf2, mvf9, mvf0 + cfsubs mvf10, mvf9, mvf4 + cfsubscc mvf8, mvf13, mvf7 + cfsubdne mvd12, mvd6, mvd11 + cfsubdvc mvd5, mvd14, mvd3 + cfsubdge mvd1, mvd8, mvd15 + cfsubdvs mvd11, mvd4, mvd2 + cfsubdeq mvd5, mvd15, mvd10 + cfmulsmi mvf14, mvf3, mvf8 + cfmulsvc mvf2, mvf1, mvf12 + cfmulslt mvf0, mvf7, mvf5 + cfmulscc mvf12, mvf10, mvf1 + cfmuls mvf13, mvf6, mvf11 + cfmuldcs mvd9, mvd0, mvd5 + cfmuldge mvd9, mvd4, mvd14 + cfmuldhi mvd13, mvd7, mvd2 + cfmuldgt mvd6, mvd11, mvd0 + cfmuldpl mvd14, mvd3, mvd12 int_arith: - cfabs32eq mvfx7, mvfx5 - cfabs32al mvfx3, mvfx12 - cfabs32ge mvfx1, mvfx8 - cfabs32 mvfx13, mvfx6 - cfabs32lt mvfx4, mvfx2 - cfabs64ls mvdx0, mvdx5 - cfabs64 mvdx10, mvdx9 - cfabs64mi mvdx14, mvdx3 - cfabs64hi mvdx13, mvdx7 - cfabs64cs mvdx1, mvdx12 - cfneg32vs mvfx11, mvfx0 - cfneg32vc mvfx5, mvfx14 - cfneg32cc mvfx12, mvfx10 - cfneg32ne mvfx8, mvfx15 - cfneg32le mvfx6, mvfx11 - cfneg64mi mvdx2, mvdx9 - cfneg64eq mvdx5, mvdx15 - cfneg64ge mvdx9, mvdx4 - cfneg64al mvdx3, mvdx8 - cfneg64le mvdx7, mvdx2 - cfadd32ne mvfx12, mvfx6, mvfx11 - cfadd32vc mvfx5, mvfx14, mvfx3 - cfadd32ge mvfx1, mvfx8, mvfx15 - cfadd32vs mvfx11, mvfx4, mvfx2 - cfadd32eq mvfx5, mvfx15, mvfx10 - cfadd64mi mvdx14, mvdx3, mvdx8 - cfadd64vc mvdx2, mvdx1, mvdx12 - cfadd64lt mvdx0, mvdx7, mvdx5 - cfadd64cc mvdx12, mvdx10, mvdx1 - cfadd64 mvdx13, mvdx6, mvdx11 - cfsub32cs mvfx9, mvfx0, mvfx5 - cfsub32ge mvfx9, mvfx4, mvfx14 - cfsub32hi mvfx13, mvfx7, mvfx2 - cfsub32gt mvfx6, mvfx11, mvfx0 - cfsub32pl mvfx14, mvfx3, mvfx12 - cfsub64ne mvdx8, mvdx15, mvdx13 - cfsub64lt mvdx4, mvdx2, mvdx9 - cfsub64pl mvdx15, mvdx10, mvdx9 - cfsub64al mvdx3, mvdx8, mvdx13 - cfsub64cs mvdx1, mvdx12, mvdx6 - cfmul32eq mvfx7, mvfx5, mvfx14 - cfmul32gt mvfx10, mvfx1, mvfx8 - cfmul32le mvfx6, mvfx11, mvfx4 - cfmul32ls mvfx0, mvfx5, mvfx15 - cfmul32ls mvfx4, mvfx14, mvfx3 - cfmul64le mvdx7, mvdx2, mvdx1 - cfmul64vs mvdx11, mvdx0, mvdx7 - cfmul64al mvdx3, mvdx12, mvdx10 - cfmul64hi mvdx15, mvdx13, mvdx6 - cfmul64mi mvdx2, mvdx9, mvdx0 - cfmac32 mvfx10, mvfx9, mvfx4 - cfmac32cc mvfx8, mvfx13, mvfx7 - cfmac32ne mvfx12, mvfx6, mvfx11 - cfmac32vc mvfx5, mvfx14, mvfx3 - cfmac32ge mvfx1, mvfx8, mvfx15 - cfmsc32vs mvfx11, mvfx4, mvfx2 - cfmsc32eq mvfx5, mvfx15, mvfx10 - cfmsc32mi mvfx14, mvfx3, mvfx8 - cfmsc32vc mvfx2, mvfx1, mvfx12 - cfmsc32lt mvfx0, mvfx7, mvfx5 + cfabs32ne mvfx8, mvfx15 + cfabs32le mvfx6, mvfx11 + cfabs32mi mvfx2, mvfx9 + cfabs32eq mvfx5, mvfx15 + cfabs32ge mvfx9, mvfx4 + cfabs64al mvdx3, mvdx8 + cfabs64le mvdx7, mvdx2 + cfabs64ne mvdx12, mvdx6 + cfabs64lt mvdx0, mvdx7 + cfabs64pl mvdx14, mvdx3 + cfneg32gt mvfx10, mvfx1 + cfneg32hi mvfx15, mvfx13 + cfneg32vs mvfx11, mvfx4 + cfneg32cs mvfx9, mvfx0 + cfneg32pl mvfx15, mvfx10 + cfneg64ls mvdx4, mvdx14 + cfneg64cc mvdx8, mvdx13 + cfneg64vc mvdx2, mvdx1 + cfneg64gt mvdx6, mvdx11 + cfneg64eq mvdx7, mvdx5 + cfadd32al mvfx3, mvfx12, mvfx10 + cfadd32hi mvfx15, mvfx13, mvfx6 + cfadd32mi mvfx2, mvfx9, mvfx0 + cfadd32 mvfx10, mvfx9, mvfx4 + cfadd32cc mvfx8, mvfx13, mvfx7 + cfadd64ne mvdx12, mvdx6, mvdx11 + cfadd64vc mvdx5, mvdx14, mvdx3 + cfadd64ge mvdx1, mvdx8, mvdx15 + cfadd64vs mvdx11, mvdx4, mvdx2 + cfadd64eq mvdx5, mvdx15, mvdx10 + cfsub32mi mvfx14, mvfx3, mvfx8 + cfsub32vc mvfx2, mvfx1, mvfx12 + cfsub32lt mvfx0, mvfx7, mvfx5 + cfsub32cc mvfx12, mvfx10, mvfx1 + cfsub32 mvfx13, mvfx6, mvfx11 + cfsub64cs mvdx9, mvdx0, mvdx5 + cfsub64ge mvdx9, mvdx4, mvdx14 + cfsub64hi mvdx13, mvdx7, mvdx2 + cfsub64gt mvdx6, mvdx11, mvdx0 + cfsub64pl mvdx14, mvdx3, mvdx12 + cfmul32ne mvfx8, mvfx15, mvfx13 + cfmul32lt mvfx4, mvfx2, mvfx9 + cfmul32pl mvfx15, mvfx10, mvfx9 + cfmul32al mvfx3, mvfx8, mvfx13 + cfmul32cs mvfx1, mvfx12, mvfx6 + cfmul64eq mvdx7, mvdx5, mvdx14 + cfmul64gt mvdx10, mvdx1, mvdx8 + cfmul64le mvdx6, mvdx11, mvdx4 + cfmul64ls mvdx0, mvdx5, mvdx15 + cfmul64ls mvdx4, mvdx14, mvdx3 + cfmac32le mvfx7, mvfx2, mvfx1 + cfmac32vs mvfx11, mvfx0, mvfx7 + cfmac32al mvfx3, mvfx12, mvfx10 + cfmac32hi mvfx15, mvfx13, mvfx6 + cfmac32mi mvfx2, mvfx9, mvfx0 + cfmsc32 mvfx10, mvfx9, mvfx4 + cfmsc32cc mvfx8, mvfx13, mvfx7 + cfmsc32ne mvfx12, mvfx6, mvfx11 + cfmsc32vc mvfx5, mvfx14, mvfx3 + cfmsc32ge mvfx1, mvfx8, mvfx15 acc_arith: - cfmadd32cc mvax0, mvfx10, mvfx1, mvfx8 - cfmadd32 mvax2, mvfx6, mvfx11, mvfx4 - cfmadd32cs mvax1, mvfx0, mvfx5, mvfx15 - cfmadd32ge mvax2, mvfx4, mvfx14, mvfx3 - cfmadd32hi mvax3, mvfx7, mvfx2, mvfx1 - cfmsub32gt mvax0, mvfx11, mvfx0, mvfx7 - cfmsub32pl mvax2, mvfx3, mvfx12, mvfx10 - cfmsub32ne mvax1, mvfx15, mvfx13, mvfx6 - cfmsub32lt mvax2, mvfx2, mvfx9, mvfx0 - cfmsub32pl mvax3, mvfx10, mvfx9, mvfx4 - cfmadda32al mvax3, mvax1, mvfx13, mvfx7 - cfmadda32cs mvax3, mvax2, mvfx6, mvfx11 - cfmadda32eq mvax1, mvax3, mvfx14, mvfx3 - cfmadda32gt mvax1, mvax3, mvfx8, mvfx15 - cfmadda32le mvax0, mvax3, mvfx4, mvfx2 - cfmsuba32ls mvax0, mvax1, mvfx15, mvfx10 - cfmsuba32ls mvax0, mvax1, mvfx3, mvfx8 - cfmsuba32le mvax2, mvax0, mvfx1, mvfx12 - cfmsuba32vs mvax1, mvax0, mvfx7, mvfx5 - cfmsuba32al mvax2, mvax0, mvfx10, mvfx1 + cfmadd32vs mvax3, mvfx4, mvfx2, mvfx9 + cfmadd32eq mvax1, mvfx15, mvfx10, mvfx9 + cfmadd32mi mvax1, mvfx3, mvfx8, mvfx13 + cfmadd32vc mvax0, mvfx1, mvfx12, mvfx6 + cfmadd32lt mvax0, mvfx7, mvfx5, mvfx14 + cfmsub32cc mvax0, mvfx10, mvfx1, mvfx8 + cfmsub32 mvax2, mvfx6, mvfx11, mvfx4 + cfmsub32cs mvax1, mvfx0, mvfx5, mvfx15 + cfmsub32ge mvax2, mvfx4, mvfx14, mvfx3 + cfmsub32hi mvax3, mvfx7, mvfx2, mvfx1 + cfmadda32gt mvax0, mvax1, mvfx0, mvfx7 + cfmadda32pl mvax2, mvax2, mvfx12, mvfx10 + cfmadda32ne mvax1, mvax3, mvfx13, mvfx6 + cfmadda32lt mvax2, mvax0, mvfx9, mvfx0 + cfmadda32pl mvax3, mvax2, mvfx9, mvfx4 + cfmsuba32al mvax3, mvax1, mvfx13, mvfx7 + cfmsuba32cs mvax3, mvax2, mvfx6, mvfx11 + cfmsuba32eq mvax1, mvax3, mvfx14, mvfx3 + cfmsuba32gt mvax1, mvax3, mvfx8, mvfx15 + cfmsuba32le mvax0, mvax3, mvfx4, mvfx2 diff --git a/ld/ChangeLog b/ld/ChangeLog index 395d7d29a72..e7d58eee893 100644 --- a/ld/ChangeLog +++ b/ld/ChangeLog @@ -1,3 +1,7 @@ +2003-03-24 Daniel Néri + + * ld.texinfo: Rename all occurances of C54X to TIC54X. + 2003-03-19 Andreas Schwab * ldfile.c (ldfile_try_open_bfd): Pop lexer start condition after @@ -419,7 +423,7 @@ for various msp430 configurations. * gen-doc.texi: Enable msp430 documenation. * ld.texinfo: Document msp430 sections. - * scripttempl/elf32msp430.sc: New file. Linker script for msp430. + * scripttempl/elf32msp430.sc: New file.-b Linker script for msp430.-A * scripttempl/elf32msp430_3.sc: New file. Linker script for msp430. 2002-12-30 Ralf Habacker diff --git a/ld/ld.texinfo b/ld/ld.texinfo index a23deefee4e..122f71a21ee 100644 --- a/ld/ld.texinfo +++ b/ld/ld.texinfo @@ -41,7 +41,7 @@ @set PJ @set SH @set SPARC -@set C54X +@set TIC54X @set V850 @set VAX @set WIN32