From: Marek Olšák Date: Tue, 4 Mar 2014 18:46:55 +0000 (+0100) Subject: r600g: move cayman MSAA setup to a common place X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=946d1cfe3948ca18225313b69a6d3f30b949a84b;p=mesa.git r600g: move cayman MSAA setup to a common place I will use this in radeonsi. Reviewed-by: Michel Dänzer --- diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c index d4900e6edec..d0291ff4843 100644 --- a/src/gallium/drivers/r600/evergreen_state.c +++ b/src/gallium/drivers/r600/evergreen_state.c @@ -1448,30 +1448,7 @@ static void evergreen_set_framebuffer_state(struct pipe_context *ctx, rctx->framebuffer.atom.dirty = true; } -#define FILL_SREG(s0x, s0y, s1x, s1y, s2x, s2y, s3x, s3y) \ - (((s0x) & 0xf) | (((s0y) & 0xf) << 4) | \ - (((s1x) & 0xf) << 8) | (((s1y) & 0xf) << 12) | \ - (((s2x) & 0xf) << 16) | (((s2y) & 0xf) << 20) | \ - (((s3x) & 0xf) << 24) | (((s3y) & 0xf) << 28)) - -/* 2xMSAA - * There are two locations (-4, 4), (4, -4). */ -static uint32_t sample_locs_2x[] = { - FILL_SREG(-4, 4, 4, -4, -4, 4, 4, -4), - FILL_SREG(-4, 4, 4, -4, -4, 4, 4, -4), - FILL_SREG(-4, 4, 4, -4, -4, 4, 4, -4), - FILL_SREG(-4, 4, 4, -4, -4, 4, 4, -4), -}; -static unsigned max_dist_2x = 4; -/* 4xMSAA - * There are 4 locations: (-2, -2), (2, 2), (-6, 6), (6, -6). */ -static uint32_t sample_locs_4x[] = { - FILL_SREG(-2, -2, 2, 2, -6, 6, 6, -6), - FILL_SREG(-2, -2, 2, 2, -6, 6, 6, -6), - FILL_SREG(-2, -2, 2, 2, -6, 6, 6, -6), - FILL_SREG(-2, -2, 2, 2, -6, 6, 6, -6), -}; -static unsigned max_dist_4x = 6; + /* 8xMSAA */ static uint32_t sample_locs_8x[] = { FILL_SREG(-1, 1, 1, 5, 3, -5, 5, 3), @@ -1501,16 +1478,16 @@ static void evergreen_get_sample_position(struct pipe_context *ctx, break; case 2: offset = 4 * (sample_index * 2); - val.idx = (sample_locs_2x[0] >> offset) & 0xf; + val.idx = (eg_sample_locs_2x[0] >> offset) & 0xf; out_value[0] = (float)(val.idx + 8) / 16.0f; - val.idx = (sample_locs_2x[0] >> (offset + 4)) & 0xf; + val.idx = (eg_sample_locs_2x[0] >> (offset + 4)) & 0xf; out_value[1] = (float)(val.idx + 8) / 16.0f; break; case 4: offset = 4 * (sample_index * 2); - val.idx = (sample_locs_4x[0] >> offset) & 0xf; + val.idx = (eg_sample_locs_4x[0] >> offset) & 0xf; out_value[0] = (float)(val.idx + 8) / 16.0f; - val.idx = (sample_locs_4x[0] >> (offset + 4)) & 0xf; + val.idx = (eg_sample_locs_4x[0] >> (offset + 4)) & 0xf; out_value[1] = (float)(val.idx + 8) / 16.0f; break; case 8: @@ -1535,14 +1512,14 @@ static void evergreen_emit_msaa_state(struct r600_context *rctx, int nr_samples) nr_samples = 0; break; case 2: - r600_write_context_reg_seq(cs, R_028C1C_PA_SC_AA_SAMPLE_LOCS_0, Elements(sample_locs_2x)); - radeon_emit_array(cs, sample_locs_2x, Elements(sample_locs_2x)); - max_dist = max_dist_2x; + r600_write_context_reg_seq(cs, R_028C1C_PA_SC_AA_SAMPLE_LOCS_0, Elements(eg_sample_locs_2x)); + radeon_emit_array(cs, eg_sample_locs_2x, Elements(eg_sample_locs_2x)); + max_dist = eg_max_dist_2x; break; case 4: - r600_write_context_reg_seq(cs, R_028C1C_PA_SC_AA_SAMPLE_LOCS_0, Elements(sample_locs_4x)); - radeon_emit_array(cs, sample_locs_4x, Elements(sample_locs_4x)); - max_dist = max_dist_4x; + r600_write_context_reg_seq(cs, R_028C1C_PA_SC_AA_SAMPLE_LOCS_0, Elements(eg_sample_locs_4x)); + radeon_emit_array(cs, eg_sample_locs_4x, Elements(eg_sample_locs_4x)); + max_dist = eg_max_dist_4x; break; case 8: r600_write_context_reg_seq(cs, R_028C1C_PA_SC_AA_SAMPLE_LOCS_0, Elements(sample_locs_8x)); @@ -1564,178 +1541,6 @@ static void evergreen_emit_msaa_state(struct r600_context *rctx, int nr_samples) } } -/* Cayman 8xMSAA */ -static uint32_t cm_sample_locs_8x[] = { - FILL_SREG(-2, -5, 3, -4, -1, 5, -6, -2), - FILL_SREG(-2, -5, 3, -4, -1, 5, -6, -2), - FILL_SREG(-2, -5, 3, -4, -1, 5, -6, -2), - FILL_SREG(-2, -5, 3, -4, -1, 5, -6, -2), - FILL_SREG( 6, 0, 0, 0, -5, 3, 4, 4), - FILL_SREG( 6, 0, 0, 0, -5, 3, 4, 4), - FILL_SREG( 6, 0, 0, 0, -5, 3, 4, 4), - FILL_SREG( 6, 0, 0, 0, -5, 3, 4, 4), -}; -static unsigned cm_max_dist_8x = 8; -/* Cayman 16xMSAA */ -static uint32_t cm_sample_locs_16x[] = { - FILL_SREG(-7, -3, 7, 3, 1, -5, -5, 5), - FILL_SREG(-7, -3, 7, 3, 1, -5, -5, 5), - FILL_SREG(-7, -3, 7, 3, 1, -5, -5, 5), - FILL_SREG(-7, -3, 7, 3, 1, -5, -5, 5), - FILL_SREG(-3, -7, 3, 7, 5, -1, -1, 1), - FILL_SREG(-3, -7, 3, 7, 5, -1, -1, 1), - FILL_SREG(-3, -7, 3, 7, 5, -1, -1, 1), - FILL_SREG(-3, -7, 3, 7, 5, -1, -1, 1), - FILL_SREG(-8, -6, 4, 2, 2, -8, -2, 6), - FILL_SREG(-8, -6, 4, 2, 2, -8, -2, 6), - FILL_SREG(-8, -6, 4, 2, 2, -8, -2, 6), - FILL_SREG(-8, -6, 4, 2, 2, -8, -2, 6), - FILL_SREG(-4, -2, 0, 4, 6, -4, -6, 0), - FILL_SREG(-4, -2, 0, 4, 6, -4, -6, 0), - FILL_SREG(-4, -2, 0, 4, 6, -4, -6, 0), - FILL_SREG(-4, -2, 0, 4, 6, -4, -6, 0), -}; -static unsigned cm_max_dist_16x = 8; -static void cayman_get_sample_position(struct pipe_context *ctx, - unsigned sample_count, - unsigned sample_index, - float *out_value) -{ - int offset, index; - struct { - int idx:4; - } val; - switch (sample_count) { - case 1: - default: - out_value[0] = out_value[1] = 0.5; - break; - case 2: - offset = 4 * (sample_index * 2); - val.idx = (sample_locs_2x[0] >> offset) & 0xf; - out_value[0] = (float)(val.idx + 8) / 16.0f; - val.idx = (sample_locs_2x[0] >> (offset + 4)) & 0xf; - out_value[1] = (float)(val.idx + 8) / 16.0f; - break; - case 4: - offset = 4 * (sample_index * 2); - val.idx = (sample_locs_4x[0] >> offset) & 0xf; - out_value[0] = (float)(val.idx + 8) / 16.0f; - val.idx = (sample_locs_4x[0] >> (offset + 4)) & 0xf; - out_value[1] = (float)(val.idx + 8) / 16.0f; - break; - case 8: - offset = 4 * (sample_index % 4 * 2); - index = (sample_index / 4) * 4; - val.idx = (cm_sample_locs_8x[index] >> offset) & 0xf; - out_value[0] = (float)(val.idx + 8) / 16.0f; - val.idx = (cm_sample_locs_8x[index] >> (offset + 4)) & 0xf; - out_value[1] = (float)(val.idx + 8) / 16.0f; - break; - case 16: - offset = 4 * (sample_index % 4 * 2); - index = (sample_index / 4) * 4; - val.idx = (cm_sample_locs_16x[index] >> offset) & 0xf; - out_value[0] = (float)(val.idx + 8) / 16.0f; - val.idx = (cm_sample_locs_16x[index] >> (offset + 4)) & 0xf; - out_value[1] = (float)(val.idx + 8) / 16.0f; - break; - } -} - -static void cayman_emit_msaa_state(struct r600_context *rctx, int nr_samples) -{ - - - struct radeon_winsys_cs *cs = rctx->b.rings.gfx.cs; - unsigned max_dist = 0; - - switch (nr_samples) { - default: - nr_samples = 0; - break; - case 2: - r600_write_context_reg(cs, CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, sample_locs_2x[0]); - r600_write_context_reg(cs, CM_R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, sample_locs_2x[1]); - r600_write_context_reg(cs, CM_R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0, sample_locs_2x[2]); - r600_write_context_reg(cs, CM_R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0, sample_locs_2x[3]); - max_dist = max_dist_2x; - break; - case 4: - r600_write_context_reg(cs, CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, sample_locs_4x[0]); - r600_write_context_reg(cs, CM_R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, sample_locs_4x[1]); - r600_write_context_reg(cs, CM_R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0, sample_locs_4x[2]); - r600_write_context_reg(cs, CM_R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0, sample_locs_4x[3]); - max_dist = max_dist_4x; - break; - case 8: - r600_write_context_reg_seq(cs, CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, 14); - radeon_emit(cs, cm_sample_locs_8x[0]); - radeon_emit(cs, cm_sample_locs_8x[4]); - radeon_emit(cs, 0); - radeon_emit(cs, 0); - radeon_emit(cs, cm_sample_locs_8x[1]); - radeon_emit(cs, cm_sample_locs_8x[5]); - radeon_emit(cs, 0); - radeon_emit(cs, 0); - radeon_emit(cs, cm_sample_locs_8x[2]); - radeon_emit(cs, cm_sample_locs_8x[6]); - radeon_emit(cs, 0); - radeon_emit(cs, 0); - radeon_emit(cs, cm_sample_locs_8x[3]); - radeon_emit(cs, cm_sample_locs_8x[7]); - max_dist = cm_max_dist_8x; - break; - case 16: - r600_write_context_reg_seq(cs, CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, 16); - radeon_emit(cs, cm_sample_locs_16x[0]); - radeon_emit(cs, cm_sample_locs_16x[4]); - radeon_emit(cs, cm_sample_locs_16x[8]); - radeon_emit(cs, cm_sample_locs_16x[12]); - radeon_emit(cs, cm_sample_locs_16x[1]); - radeon_emit(cs, cm_sample_locs_16x[5]); - radeon_emit(cs, cm_sample_locs_16x[9]); - radeon_emit(cs, cm_sample_locs_16x[13]); - radeon_emit(cs, cm_sample_locs_16x[2]); - radeon_emit(cs, cm_sample_locs_16x[6]); - radeon_emit(cs, cm_sample_locs_16x[10]); - radeon_emit(cs, cm_sample_locs_16x[14]); - radeon_emit(cs, cm_sample_locs_16x[3]); - radeon_emit(cs, cm_sample_locs_16x[7]); - radeon_emit(cs, cm_sample_locs_16x[11]); - radeon_emit(cs, cm_sample_locs_16x[15]); - max_dist = cm_max_dist_16x; - break; - } - - if (nr_samples > 1) { - unsigned log_samples = util_logbase2(nr_samples); - - r600_write_context_reg_seq(cs, CM_R_028BDC_PA_SC_LINE_CNTL, 2); - radeon_emit(cs, S_028C00_LAST_PIXEL(1) | - S_028C00_EXPAND_LINE_WIDTH(1)); /* CM_R_028BDC_PA_SC_LINE_CNTL */ - radeon_emit(cs, S_028BE0_MSAA_NUM_SAMPLES(log_samples) | - S_028BE0_MAX_SAMPLE_DIST(max_dist) | - S_028BE0_MSAA_EXPOSED_SAMPLES(log_samples)); /* CM_R_028BE0_PA_SC_AA_CONFIG */ - - r600_write_context_reg(cs, CM_R_028804_DB_EQAA, - S_028804_MAX_ANCHOR_SAMPLES(log_samples) | - S_028804_PS_ITER_SAMPLES(log_samples) | - S_028804_MASK_EXPORT_NUM_SAMPLES(log_samples) | - S_028804_ALPHA_TO_MASK_NUM_SAMPLES(log_samples) | - S_028804_HIGH_QUALITY_INTERSECTIONS(1) | - S_028804_STATIC_ANCHOR_ASSOCIATIONS(1)); - } else { - r600_write_context_reg_seq(cs, CM_R_028BDC_PA_SC_LINE_CNTL, 2); - radeon_emit(cs, S_028C00_LAST_PIXEL(1)); /* CM_R_028BDC_PA_SC_LINE_CNTL */ - radeon_emit(cs, 0); /* CM_R_028BE0_PA_SC_AA_CONFIG */ - - r600_write_context_reg(cs, CM_R_028804_DB_EQAA, - S_028804_HIGH_QUALITY_INTERSECTIONS(1) | - S_028804_STATIC_ANCHOR_ASSOCIATIONS(1)); - } -} - static void evergreen_emit_framebuffer_state(struct r600_context *rctx, struct r600_atom *atom) { struct radeon_winsys_cs *cs = rctx->b.rings.gfx.cs; @@ -1894,7 +1699,7 @@ static void evergreen_emit_framebuffer_state(struct r600_context *rctx, struct r if (rctx->b.chip_class == EVERGREEN) { evergreen_emit_msaa_state(rctx, rctx->framebuffer.nr_samples); } else { - cayman_emit_msaa_state(rctx, rctx->framebuffer.nr_samples); + cayman_emit_msaa_state(cs, rctx->framebuffer.nr_samples); } } diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c index e0e75c6b28a..6d89e6ce88b 100644 --- a/src/gallium/drivers/r600/r600_state.c +++ b/src/gallium/drivers/r600/r600_state.c @@ -1240,13 +1240,6 @@ static void r600_set_framebuffer_state(struct pipe_context *ctx, rctx->framebuffer.atom.dirty = true; } -#define FILL_SREG(s0x, s0y, s1x, s1y, s2x, s2y, s3x, s3y) \ - (((s0x) & 0xf) | (((s0y) & 0xf) << 4) | \ - (((s1x) & 0xf) << 8) | (((s1y) & 0xf) << 12) | \ - (((s2x) & 0xf) << 16) | (((s2y) & 0xf) << 20) | \ - (((s3x) & 0xf) << 24) | (((s3y) & 0xf) << 28)) - - static uint32_t sample_locs_2x[] = { FILL_SREG(-4, 4, 4, -4, -4, 4, 4, -4), FILL_SREG(-4, 4, 4, -4, -4, 4, 4, -4), diff --git a/src/gallium/drivers/radeon/Makefile.sources b/src/gallium/drivers/radeon/Makefile.sources index 0062d4b4e67..fbb13926c8e 100644 --- a/src/gallium/drivers/radeon/Makefile.sources +++ b/src/gallium/drivers/radeon/Makefile.sources @@ -1,4 +1,5 @@ C_SOURCES := \ + cayman_msaa.c \ r600_buffer_common.c \ r600_pipe_common.c \ r600_query.c \ diff --git a/src/gallium/drivers/radeon/cayman_msaa.c b/src/gallium/drivers/radeon/cayman_msaa.c new file mode 100644 index 00000000000..9e6ceda5457 --- /dev/null +++ b/src/gallium/drivers/radeon/cayman_msaa.c @@ -0,0 +1,214 @@ +/* + * Copyright 2014 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Authors: Marek Olšák + * + */ + +#include "r600_cs.h" + +/* 2xMSAA + * There are two locations (-4, 4), (4, -4). */ +const uint32_t eg_sample_locs_2x[4] = { + FILL_SREG(-4, 4, 4, -4, -4, 4, 4, -4), + FILL_SREG(-4, 4, 4, -4, -4, 4, 4, -4), + FILL_SREG(-4, 4, 4, -4, -4, 4, 4, -4), + FILL_SREG(-4, 4, 4, -4, -4, 4, 4, -4), +}; +const unsigned eg_max_dist_2x = 4; +/* 4xMSAA + * There are 4 locations: (-2, -2), (2, 2), (-6, 6), (6, -6). */ +const uint32_t eg_sample_locs_4x[4] = { + FILL_SREG(-2, -2, 2, 2, -6, 6, 6, -6), + FILL_SREG(-2, -2, 2, 2, -6, 6, 6, -6), + FILL_SREG(-2, -2, 2, 2, -6, 6, 6, -6), + FILL_SREG(-2, -2, 2, 2, -6, 6, 6, -6), +}; +const unsigned eg_max_dist_4x = 6; + +/* Cayman 8xMSAA */ +static const uint32_t cm_sample_locs_8x[] = { + FILL_SREG(-2, -5, 3, -4, -1, 5, -6, -2), + FILL_SREG(-2, -5, 3, -4, -1, 5, -6, -2), + FILL_SREG(-2, -5, 3, -4, -1, 5, -6, -2), + FILL_SREG(-2, -5, 3, -4, -1, 5, -6, -2), + FILL_SREG( 6, 0, 0, 0, -5, 3, 4, 4), + FILL_SREG( 6, 0, 0, 0, -5, 3, 4, 4), + FILL_SREG( 6, 0, 0, 0, -5, 3, 4, 4), + FILL_SREG( 6, 0, 0, 0, -5, 3, 4, 4), +}; +static const unsigned cm_max_dist_8x = 8; +/* Cayman 16xMSAA */ +static const uint32_t cm_sample_locs_16x[] = { + FILL_SREG(-7, -3, 7, 3, 1, -5, -5, 5), + FILL_SREG(-7, -3, 7, 3, 1, -5, -5, 5), + FILL_SREG(-7, -3, 7, 3, 1, -5, -5, 5), + FILL_SREG(-7, -3, 7, 3, 1, -5, -5, 5), + FILL_SREG(-3, -7, 3, 7, 5, -1, -1, 1), + FILL_SREG(-3, -7, 3, 7, 5, -1, -1, 1), + FILL_SREG(-3, -7, 3, 7, 5, -1, -1, 1), + FILL_SREG(-3, -7, 3, 7, 5, -1, -1, 1), + FILL_SREG(-8, -6, 4, 2, 2, -8, -2, 6), + FILL_SREG(-8, -6, 4, 2, 2, -8, -2, 6), + FILL_SREG(-8, -6, 4, 2, 2, -8, -2, 6), + FILL_SREG(-8, -6, 4, 2, 2, -8, -2, 6), + FILL_SREG(-4, -2, 0, 4, 6, -4, -6, 0), + FILL_SREG(-4, -2, 0, 4, 6, -4, -6, 0), + FILL_SREG(-4, -2, 0, 4, 6, -4, -6, 0), + FILL_SREG(-4, -2, 0, 4, 6, -4, -6, 0), +}; +static const unsigned cm_max_dist_16x = 8; + +void cayman_get_sample_position(struct pipe_context *ctx, unsigned sample_count, + unsigned sample_index, float *out_value) +{ + int offset, index; + struct { + int idx:4; + } val; + switch (sample_count) { + case 1: + default: + out_value[0] = out_value[1] = 0.5; + break; + case 2: + offset = 4 * (sample_index * 2); + val.idx = (eg_sample_locs_2x[0] >> offset) & 0xf; + out_value[0] = (float)(val.idx + 8) / 16.0f; + val.idx = (eg_sample_locs_2x[0] >> (offset + 4)) & 0xf; + out_value[1] = (float)(val.idx + 8) / 16.0f; + break; + case 4: + offset = 4 * (sample_index * 2); + val.idx = (eg_sample_locs_4x[0] >> offset) & 0xf; + out_value[0] = (float)(val.idx + 8) / 16.0f; + val.idx = (eg_sample_locs_4x[0] >> (offset + 4)) & 0xf; + out_value[1] = (float)(val.idx + 8) / 16.0f; + break; + case 8: + offset = 4 * (sample_index % 4 * 2); + index = (sample_index / 4) * 4; + val.idx = (cm_sample_locs_8x[index] >> offset) & 0xf; + out_value[0] = (float)(val.idx + 8) / 16.0f; + val.idx = (cm_sample_locs_8x[index] >> (offset + 4)) & 0xf; + out_value[1] = (float)(val.idx + 8) / 16.0f; + break; + case 16: + offset = 4 * (sample_index % 4 * 2); + index = (sample_index / 4) * 4; + val.idx = (cm_sample_locs_16x[index] >> offset) & 0xf; + out_value[0] = (float)(val.idx + 8) / 16.0f; + val.idx = (cm_sample_locs_16x[index] >> (offset + 4)) & 0xf; + out_value[1] = (float)(val.idx + 8) / 16.0f; + break; + } +} + +void cayman_emit_msaa_state(struct radeon_winsys_cs *cs, int nr_samples) +{ + unsigned max_dist = 0; + + switch (nr_samples) { + default: + nr_samples = 0; + break; + case 2: + r600_write_context_reg(cs, CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, eg_sample_locs_2x[0]); + r600_write_context_reg(cs, CM_R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, eg_sample_locs_2x[1]); + r600_write_context_reg(cs, CM_R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0, eg_sample_locs_2x[2]); + r600_write_context_reg(cs, CM_R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0, eg_sample_locs_2x[3]); + max_dist = eg_max_dist_2x; + break; + case 4: + r600_write_context_reg(cs, CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, eg_sample_locs_4x[0]); + r600_write_context_reg(cs, CM_R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, eg_sample_locs_4x[1]); + r600_write_context_reg(cs, CM_R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0, eg_sample_locs_4x[2]); + r600_write_context_reg(cs, CM_R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0, eg_sample_locs_4x[3]); + max_dist = eg_max_dist_4x; + break; + case 8: + r600_write_context_reg_seq(cs, CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, 14); + radeon_emit(cs, cm_sample_locs_8x[0]); + radeon_emit(cs, cm_sample_locs_8x[4]); + radeon_emit(cs, 0); + radeon_emit(cs, 0); + radeon_emit(cs, cm_sample_locs_8x[1]); + radeon_emit(cs, cm_sample_locs_8x[5]); + radeon_emit(cs, 0); + radeon_emit(cs, 0); + radeon_emit(cs, cm_sample_locs_8x[2]); + radeon_emit(cs, cm_sample_locs_8x[6]); + radeon_emit(cs, 0); + radeon_emit(cs, 0); + radeon_emit(cs, cm_sample_locs_8x[3]); + radeon_emit(cs, cm_sample_locs_8x[7]); + max_dist = cm_max_dist_8x; + break; + case 16: + r600_write_context_reg_seq(cs, CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, 16); + radeon_emit(cs, cm_sample_locs_16x[0]); + radeon_emit(cs, cm_sample_locs_16x[4]); + radeon_emit(cs, cm_sample_locs_16x[8]); + radeon_emit(cs, cm_sample_locs_16x[12]); + radeon_emit(cs, cm_sample_locs_16x[1]); + radeon_emit(cs, cm_sample_locs_16x[5]); + radeon_emit(cs, cm_sample_locs_16x[9]); + radeon_emit(cs, cm_sample_locs_16x[13]); + radeon_emit(cs, cm_sample_locs_16x[2]); + radeon_emit(cs, cm_sample_locs_16x[6]); + radeon_emit(cs, cm_sample_locs_16x[10]); + radeon_emit(cs, cm_sample_locs_16x[14]); + radeon_emit(cs, cm_sample_locs_16x[3]); + radeon_emit(cs, cm_sample_locs_16x[7]); + radeon_emit(cs, cm_sample_locs_16x[11]); + radeon_emit(cs, cm_sample_locs_16x[15]); + max_dist = cm_max_dist_16x; + break; + } + + if (nr_samples > 1) { + unsigned log_samples = util_logbase2(nr_samples); + + r600_write_context_reg_seq(cs, CM_R_028BDC_PA_SC_LINE_CNTL, 2); + radeon_emit(cs, S_028BDC_LAST_PIXEL(1) | + S_028BDC_EXPAND_LINE_WIDTH(1)); /* CM_R_028BDC_PA_SC_LINE_CNTL */ + radeon_emit(cs, S_028BE0_MSAA_NUM_SAMPLES(log_samples) | + S_028BE0_MAX_SAMPLE_DIST(max_dist) | + S_028BE0_MSAA_EXPOSED_SAMPLES(log_samples)); /* CM_R_028BE0_PA_SC_AA_CONFIG */ + + r600_write_context_reg(cs, CM_R_028804_DB_EQAA, + S_028804_MAX_ANCHOR_SAMPLES(log_samples) | + S_028804_PS_ITER_SAMPLES(log_samples) | + S_028804_MASK_EXPORT_NUM_SAMPLES(log_samples) | + S_028804_ALPHA_TO_MASK_NUM_SAMPLES(log_samples) | + S_028804_HIGH_QUALITY_INTERSECTIONS(1) | + S_028804_STATIC_ANCHOR_ASSOCIATIONS(1)); + } else { + r600_write_context_reg_seq(cs, CM_R_028BDC_PA_SC_LINE_CNTL, 2); + radeon_emit(cs, S_028BDC_LAST_PIXEL(1)); /* CM_R_028BDC_PA_SC_LINE_CNTL */ + radeon_emit(cs, 0); /* CM_R_028BE0_PA_SC_AA_CONFIG */ + + r600_write_context_reg(cs, CM_R_028804_DB_EQAA, + S_028804_HIGH_QUALITY_INTERSECTIONS(1) | + S_028804_STATIC_ANCHOR_ASSOCIATIONS(1)); + } +} diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h index 17867d3d53c..672097ddb90 100644 --- a/src/gallium/drivers/radeon/r600_pipe_common.h +++ b/src/gallium/drivers/radeon/r600_pipe_common.h @@ -440,6 +440,15 @@ unsigned r600_translate_colorswap(enum pipe_format format); void r600_init_screen_texture_functions(struct r600_common_screen *rscreen); void r600_init_context_texture_functions(struct r600_common_context *rctx); +/* cayman_msaa.c */ +extern const uint32_t eg_sample_locs_2x[4]; +extern const unsigned eg_max_dist_2x; +extern const uint32_t eg_sample_locs_4x[4]; +extern const unsigned eg_max_dist_4x; +void cayman_get_sample_position(struct pipe_context *ctx, unsigned sample_count, + unsigned sample_index, float *out_value); +void cayman_emit_msaa_state(struct radeon_winsys_cs *cs, int nr_samples); + /* Inline helpers. */ @@ -458,4 +467,11 @@ r600_resource_reference(struct r600_resource **ptr, struct r600_resource *res) #define R600_ERR(fmt, args...) \ fprintf(stderr, "EE %s:%d %s - "fmt, __FILE__, __LINE__, __func__, ##args) +/* For MSAA sample positions. */ +#define FILL_SREG(s0x, s0y, s1x, s1y, s2x, s2y, s3x, s3y) \ + (((s0x) & 0xf) | (((s0y) & 0xf) << 4) | \ + (((s1x) & 0xf) << 8) | (((s1y) & 0xf) << 12) | \ + (((s2x) & 0xf) << 16) | (((s2y) & 0xf) << 20) | \ + (((s3x) & 0xf) << 24) | (((s3y) & 0xf) << 28)) + #endif diff --git a/src/gallium/drivers/radeon/r600d_common.h b/src/gallium/drivers/radeon/r600d_common.h index 0b97d324326..cd311c22d1a 100644 --- a/src/gallium/drivers/radeon/r600d_common.h +++ b/src/gallium/drivers/radeon/r600d_common.h @@ -160,6 +160,35 @@ #define G_028B98_STREAM_3_BUFFER_EN(x) (((x) >> 12) & 0x0F) #define C_028B98_STREAM_3_BUFFER_EN 0xFFFF0FFF +#define CM_R_028804_DB_EQAA 0x00028804 +#define S_028804_MAX_ANCHOR_SAMPLES(x) (((x) & 0x7) << 0) +#define S_028804_PS_ITER_SAMPLES(x) (((x) & 0x7) << 4) +#define S_028804_MASK_EXPORT_NUM_SAMPLES(x) (((x) & 0x7) << 8) +#define S_028804_ALPHA_TO_MASK_NUM_SAMPLES(x) (((x) & 0x7) << 12) +#define S_028804_HIGH_QUALITY_INTERSECTIONS(x) (((x) & 0x1) << 16) +#define S_028804_INCOHERENT_EQAA_READS(x) (((x) & 0x1) << 17) +#define S_028804_INTERPOLATE_COMP_Z(x) (((x) & 0x1) << 18) +#define S_028804_INTERPOLATE_SRC_Z(x) (((x) & 0x1) << 19) +#define S_028804_STATIC_ANCHOR_ASSOCIATIONS(x) (((x) & 0x1) << 20) +#define S_028804_ALPHA_TO_MASK_EQAA_DISABLE(x) (((x) & 0x1) << 21) +#define CM_R_028BDC_PA_SC_LINE_CNTL 0x28bdc +#define S_028BDC_EXPAND_LINE_WIDTH(x) (((x) & 0x1) << 9) +#define G_028BDC_EXPAND_LINE_WIDTH(x) (((x) >> 9) & 0x1) +#define C_028BDC_EXPAND_LINE_WIDTH 0xFFFFFDFF +#define S_028BDC_LAST_PIXEL(x) (((x) & 0x1) << 10) +#define G_028BDC_LAST_PIXEL(x) (((x) >> 10) & 0x1) +#define C_028BDC_LAST_PIXEL 0xFFFFFBFF +#define CM_R_028BE0_PA_SC_AA_CONFIG 0x28be0 +#define S_028BE0_MSAA_NUM_SAMPLES(x) (((x) & 0x7) << 0) +#define S_028BE0_AA_MASK_CENTROID_DTMN(x) (((x) & 0x1) << 4) +#define S_028BE0_MAX_SAMPLE_DIST(x) (((x) & 0xf) << 13) +#define S_028BE0_MSAA_EXPOSED_SAMPLES(x) (((x) & 0x7) << 20) +#define S_028BE0_DETAIL_TO_EXPOSED_MODE(x) (((x) & 0x3) << 24) +#define CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0 0x28bf8 +#define CM_R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0 0x28c08 +#define CM_R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0 0x28c18 +#define CM_R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0 0x28c28 + /*CIK+*/ #define R_0300FC_CP_STRMOUT_CNTL 0x0300FC