From: Jacob Lifshay <programmerjake@gmail.com>
Date: Mon, 11 Sep 2023 20:27:43 +0000 (-0700)
Subject: fix ALU test by setting 'soc' filter to filter out addex
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=9490d6115b8aca6cd2bd50f2b21bd2d07a9e87e6;p=soc.git

fix ALU test by setting 'soc' filter to filter out addex
---

diff --git a/src/soc/fu/alu/test/test_pipe_caller.py b/src/soc/fu/alu/test/test_pipe_caller.py
index 9bbe2450..512e3794 100644
--- a/src/soc/fu/alu/test/test_pipe_caller.py
+++ b/src/soc/fu/alu/test/test_pipe_caller.py
@@ -111,7 +111,7 @@ class TestRunner(unittest.TestCase):
             yield Settle()
 
     def test_it(self):
-        test_data = ALUTestCase().test_data
+        test_data = ALUTestCase({'soc'}).test_data
         m = Module()
         comb = m.d.comb
         instruction = Signal(32)