From: David Edelsohn Date: Wed, 2 Mar 2005 18:57:30 +0000 (+0000) Subject: re PR target/20276 (64bit PPC target uses __adddi3) X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=94dcded2d4dd7a05f81b05309685e89ea10520f2;p=gcc.git re PR target/20276 (64bit PPC target uses __adddi3) PR target/20276 * config/rs6000/predicates.md (reg_or_cint64_operand): Fix typo. (reg_or_sub_cint64_operand): Same. From-SVN: r95789 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index c9ec502e9ab..363916cf1d5 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2005-03-02 David Edelsohn + + PR target/20276 + * config/rs6000/predicates.md (reg_or_cint64_operand): Fix typo. + (reg_or_sub_cint64_operand): Same. + 2005-03-02 Jeff Law * tree-ssa-dom.c (tree_ssa_dominator_optimize): Fix setting of diff --git a/gcc/config/rs6000/predicates.md b/gcc/config/rs6000/predicates.md index 10e12af99fe..5cafb4c60f6 100644 --- a/gcc/config/rs6000/predicates.md +++ b/gcc/config/rs6000/predicates.md @@ -148,7 +148,7 @@ (define_predicate "reg_or_add_cint64_operand" (if_then_else (match_code "const_int") (match_test "(HOST_BITS_PER_WIDE_INT == 32 && INTVAL (op) < 0x7fff8000) - || ((unsigned HOST_WIDE_INT) (INTVAL (op) + 0x80000000) + || ((unsigned HOST_WIDE_INT) (INTVAL (op) + 0x80008000) < (unsigned HOST_WIDE_INT) 0x100000000ll)") (match_operand 0 "gpc_reg_operand"))) @@ -157,7 +157,7 @@ (define_predicate "reg_or_sub_cint64_operand" (if_then_else (match_code "const_int") (match_test "(HOST_BITS_PER_WIDE_INT == 32 && INTVAL (op) < 0x7fff8000) - || ((unsigned HOST_WIDE_INT) ((- INTVAL (op)) + 0x80000000) + || ((unsigned HOST_WIDE_INT) ((- INTVAL (op)) + 0x80008000) < (unsigned HOST_WIDE_INT) 0x100000000ll)") (match_operand 0 "gpc_reg_operand")))