From: Luke Kenneth Casson Leighton Date: Tue, 5 Mar 2024 14:40:22 +0000 (+0000) Subject: bug 1155: exploring / fixing svshape4, fields incorrect X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=9500dc9b0;p=openpower-isa.git bug 1155: exploring / fixing svshape4, fields incorrect --- diff --git a/openpower/isa/simplev.mdwn b/openpower/isa/simplev.mdwn index 14cb10a2..01266d9a 100644 --- a/openpower/isa/simplev.mdwn +++ b/openpower/isa/simplev.mdwn @@ -488,12 +488,12 @@ Pseudo-code: shape[30:31] <- 0b11 # triangle/bigmul mode shape[28:29] <- sm # mode shape[24:27] <- SVo # offset - shape[23] <- SVyx # swap x/y priority - shape[22] <- sk # skipping + shape[22:23] <- SVyx # swap x/y priority + shape[21] <- sk # skipping shape[19:20] <- sm2 # submode2 shape[18] <- 0 # reserved shape[12:17] <- 1 # zdim - shape[6:11] <- (0b0 || SVyd) # xdim + shape[6:11] <- (0b0 || SVyd) # ydim shape[0:5] <- (0b0 || SVxd) # xdim # activate requested shape if si = 0 then SVSHAPE0 <- shape diff --git a/openpower/isatables/fields.text b/openpower/isatables/fields.text index 726c0777..a8ed8a55 100644 --- a/openpower/isatables/fields.text +++ b/openpower/isatables/fields.text @@ -305,8 +305,8 @@ # 1.6.29.1 SVI2-FORM - |0 |6 |9 |11 |16 |21 |22 |24 |26 |27 31| - |PO |SVo |si |SVyd|SVxd|sk |sm2 |sm |SVyx|XO | + |0 |6 |9 |11 |16 |21 |22 |24 |26 |28 |29 |31 | + |PO |SVo |si |SVyd|SVxd|sk |sm2 |sm |XO |SVyx|XO |SVyx| # 1.6.30 SVL-FORM |0 |6 |11 |16 |23 |24 |25 |26 |31 | @@ -887,9 +887,12 @@ Immediate field used to specify a 5-bit signed inte- ger. Formats: VX + sk (21) + Field used to specify dimensional skipping in svindex + Formats: SVI2 sk (25) Field used to specify dimensional skipping in svindex - Formats: SVI, SVM2, SVI2 + Formats: SVI, SVM2 sm (24:25) submode for svindex4 Formats: SVI2 @@ -1102,6 +1105,9 @@ XO (26:27) Extended opcode field. Formats: XX4 + XO (26:27,29:30) + Extended opcode field. + Formats: SVI2 XO (26:30) Extended opcode field. Formats: A, DX, VA2, SVL, CRB, DCT @@ -1116,7 +1122,7 @@ Formats: MDS XO (27:31) Extended opcode field. - Formats: BM2, SVI2 + Formats: BM2 XO (29:31) Extended opcode field. Formats: DQ @@ -1131,7 +1137,10 @@ Formats: DQE, DS, SC SVyx (23) Field used to specify loop dimension order in svindex - Formats: SVI, SVI2 + Formats: SVI + SVyx (28,31) + Field used to specify loop dimension order in svindex + Formats: SVI2 SVyx (10) Field used to specify loop dimension order in svshape2 Formats: SVM2 diff --git a/openpower/isatables/minor_22.csv b/openpower/isatables/minor_22.csv index 56c74f09..a6d39be4 100644 --- a/openpower/isatables/minor_22.csv +++ b/openpower/isatables/minor_22.csv @@ -27,7 +27,6 @@ opcode,unit,internal op,in1,in2,in3,out,CR in,CR out,inv A,inv out,cry in,cry ou 100--011001,VL,OP_SVSHAPE,NONE,NONE,NONE,NONE,NONE,NONE,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,svshape2,SVM2,,1,unofficial until submitted and approved/renumbered by the opf isa wg # svshape3 and svshape4, none of the horribleness of shoe-horning svshape2 in it ------10000,VL,OP_SVSHAPE,NONE,NONE,NONE,NONE,NONE,NONE,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,svshape3,SVM,,1,unofficial until submitted and approved/renumbered by the opf isa wg -------11000,VL,OP_SVSHAPE,NONE,NONE,NONE,NONE,NONE,NONE,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,svshape4,SVI2,,1,unofficial until submitted and approved/renumbered by the opf isa wg # A/V bitmanip 1101001110-,ALU,OP_AVGADD,RA,RB,NONE,RT,NONE,CR0,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC_ONLY,0,0,avgadd,X,,1,unofficial until submitted and approved/renumbered by the opf isa wg --01101110-,ALU,OP_SHADD,RA,RB,NONE,RT,NONE,CR0,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC_ONLY,0,0,sadd,Z23,,1,unofficial until submitted and approved/renumbered by the opf isa wg diff --git a/openpower/isatables/minor_5.csv b/openpower/isatables/minor_5.csv index 742d7b69..4c1dcd28 100644 --- a/openpower/isatables/minor_5.csv +++ b/openpower/isatables/minor_5.csv @@ -1,2 +1,3 @@ opcode,unit,internal op,in1,in2,in3,out,CR in,CR out,inv A,inv out,cry in,cry out,ldst len,BR,sgn ext,upd,rsrv,32b,sgn,rc,lk,sgl pipe,comment,form,CONDITIONS,unofficial,comment2 --------00-,SHIFT_ROT,OP_TERNLOG,RA,RB,RT,RT,NONE,CR0,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC_ONLY,0,0,ternlogi,TLI,,1,unofficial until submitted and approved/renumbered by the opf isa wg +-----01-01-,VL,OP_SVSHAPE,NONE,NONE,NONE,NONE,NONE,NONE,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,svshape4,SVI2,,1,unofficial until submitted and approved/renumbered by the opf isa wg diff --git a/src/openpower/decoder/isa/ed25519/curve25519_mul.py b/src/openpower/decoder/isa/ed25519/curve25519_mul.py index dbc87bbb..868ec313 100644 --- a/src/openpower/decoder/isa/ed25519/curve25519_mul.py +++ b/src/openpower/decoder/isa/ed25519/curve25519_mul.py @@ -140,7 +140,7 @@ if __name__ == '__main__': s[1] = 1<<51 r[1] = 1<<51 check(r, s) - for i in range(100000): + for i in range(1): r, s = [0]*5, [0]*5 for j in range(5): r[j] = random.randint(0, 1<<50) diff --git a/src/openpower/decoder/isa/remapyield.py b/src/openpower/decoder/isa/remapyield.py index c4df6838..23639251 100644 --- a/src/openpower/decoder/isa/remapyield.py +++ b/src/openpower/decoder/isa/remapyield.py @@ -5,14 +5,19 @@ # the indices are generated by using natural-looking nested loops def iterate_indices(SVSHAPE, VL=None): # establish if this is triangular mode - triangle = SVSHAPE.mode == 0b11 and SVSHAPE.submode & 0b10 == 0b10 - bigmul = SVSHAPE.mode == 0b11 and SVSHAPE.submode & 0b01 == 0b01 + triangle = SVSHAPE.mode == 0b11 and SVSHAPE._skip & 0b10 == 0b10 + bigmul = SVSHAPE.mode == 0b11 and SVSHAPE._skip & 0b01 == 0b01 in_offs = VL is not None and SVSHAPE.mode == 0b11 # get indices to iterate over, in the required order - xd = SVSHAPE.lims[0] - yd = SVSHAPE.lims[1] - zd = SVSHAPE.lims[2] + if SVSHAPE.mode == 0b11: # bigmul/triangle has no Z-dim + xd = 1 + yd = SVSHAPE.lims[0] + zd = SVSHAPE.lims[1] + else: + xd = SVSHAPE.lims[0] + yd = SVSHAPE.lims[1] + zd = SVSHAPE.lims[2] # create lists of indices to iterate over in each dimension _x_r = list(range(xd)) _y_r = list(range(yd)) @@ -23,6 +28,9 @@ def iterate_indices(SVSHAPE, VL=None): if SVSHAPE.invxyz[2]: z_r.reverse() # start an infinite (wrapping) loop step = 0 # track src/dst step + print("iterate_indices", VL, triangle, bigmul, in_offs, "dims", xd, yd, zd, + "mode", bin(SVSHAPE.mode), "skip", SVSHAPE.skip, + "inv", SVSHAPE.invxyz) while True: for zi, z in enumerate(z_r): # loop over 1st order dimension z_end = z == z_r[-1] @@ -38,9 +46,9 @@ def iterate_indices(SVSHAPE, VL=None): # ok work out which order to construct things in. # start by creating a list of tuples of the dimension # and its limit - vals = [(SVSHAPE.lims[0], x, "x"), - (SVSHAPE.lims[1], y, "y"), - (SVSHAPE.lims[2], z, "z") + vals = [(xd, x, "x"), + (yd, y, "y"), + (zd, z, "z") ] # now select those by order. this allows us to # create schedules for [z][x], [x][y], or [y][z] @@ -102,9 +110,11 @@ def dump_shape(SVSHAPE, VL=None): break triangle = SVSHAPE.mode == 0b11 and SVSHAPE.submode & 0b10 == 0b10 if triangle: - if SVSHAPE.lims[0] == 1: end &= ~0b001 + if SVSHAPE.lims[0] == 1: end &= ~0b010 if triangle: - if SVSHAPE.lims[1] == 1: end &= ~0b010 + if SVSHAPE.lims[1] == 1: end &= ~0b100 + if triangle: + if SVSHAPE.lims[2] == 1: end &= ~0b001 if end != 0: print() @@ -119,6 +129,7 @@ def demo(): SVSHAPE0.order = [0,2,1] # experiment with different permutations, here SVSHAPE0.mode = 0b00 SVSHAPE0.skip = 0b00 + SVSHAPE0._skip = 0b00 SVSHAPE0.submode2 = 0b000 # SVSHAPE0.offset = 0 # experiment with different offset, here SVSHAPE0.invxyz = [0,0,0] # inversion if desired @@ -134,6 +145,7 @@ def demo(): SVSHAPE0.order = [0,1,2] # experiment with different permutations, here SVSHAPE0.mode = 0b00 SVSHAPE0.skip = 0b10 + SVSHAPE0._skip = 0b10 SVSHAPE0.submode2 = 0b000 # SVSHAPE0.offset = 0 # experiment with different offset, here SVSHAPE0.invxyz = [0,0,0] # inversion if desired @@ -147,6 +159,7 @@ def demo(): SVSHAPE0.order = [0,1,2] # experiment with different permutations, here SVSHAPE0.mode = 0b00 SVSHAPE0.skip = 0b01 + SVSHAPE0._skip = 0b01 SVSHAPE0.submode2 = 0b000 # SVSHAPE0.offset = 0 # experiment with different offset, here SVSHAPE0.invxyz = [0,0,0] # inversion if desired @@ -163,6 +176,7 @@ def demo(): SVSHAPE0.order = [1,0,2] # experiment with different permutations, here SVSHAPE0.mode = 0b00 SVSHAPE0.skip = 0b00 + SVSHAPE0._skip = 0b00 SVSHAPE0.submode2 = 0b000 # SVSHAPE0.offset = 0 # experiment with different offset, here SVSHAPE0.invxyz = [0,0,0] # inversion if desired @@ -179,13 +193,14 @@ def demo(): SVSHAPE0.submode = 0b01 # rhombus mode SVSHAPE0.submode2 = 0b000 # SVSHAPE0.skip = 0b00 + SVSHAPE0._skip = 0b00 SVSHAPE0.offset = 0 # experiment with different offset, here SVSHAPE0.invxyz = [0,0,0] # inversion if desired dump_shape(SVSHAPE0) # triangle - xdim, ydim, zdim = 1, 5, 5 # set the dimension sizes here + xdim, ydim, zdim = 5, 5, 1 # set the dimension sizes here print("\ntriangle", xdim, ydim, zdim) SVSHAPE0 = SVSHAPE() SVSHAPE0.lims = [xdim, ydim, zdim] @@ -194,6 +209,7 @@ def demo(): SVSHAPE0.submode = 0b10 # triangle mode SVSHAPE0.submode2 = 0b000 # SVSHAPE0.skip = 0b11 + SVSHAPE0._skip = 0b11 SVSHAPE0.offset = 0 # experiment with different offset, here SVSHAPE0.invxyz = [0,0,0] # inversion if desired @@ -201,7 +217,7 @@ def demo(): # triangle print("\ntriangle-bigmul", xdim, ydim, zdim) - xdim, ydim, zdim = 1, 3, 5 # set the dimension sizes here + xdim, ydim, zdim = 3, 5, 1 # set the dimension sizes here SVSHAPE0 = SVSHAPE() SVSHAPE0.lims = [xdim, ydim, zdim] SVSHAPE0.order = [0,1,2] # experiment with different permutations, here @@ -209,6 +225,7 @@ def demo(): SVSHAPE0.submode = 0b11 # triangle mode, with sum SVSHAPE0.submode2 = 0b000 # SVSHAPE0.skip = 0b00 + SVSHAPE0._skip = 0b00 SVSHAPE0.offset = 0 # experiment with different offset, here SVSHAPE0.invxyz = [0,0,0] # inversion if desired @@ -225,6 +242,7 @@ def demo(): SVSHAPE0.mode = 0b11 SVSHAPE0.submode = 0b00 # SVSHAPE0.skip = 0b00 + SVSHAPE0._skip = 0b00 SVSHAPE0.submode2 = 0b000 # cols or rows modulo SVSHAPE0.offset = 1 # experiment with different offset, here SVSHAPE0.invxyz = [0,0,0] # inversion if desired diff --git a/src/openpower/decoder/isa/svshape.py b/src/openpower/decoder/isa/svshape.py index 81c08dbf..f391cb81 100644 --- a/src/openpower/decoder/isa/svshape.py +++ b/src/openpower/decoder/isa/svshape.py @@ -39,7 +39,7 @@ class SVSHAPE(SelectableInt): fs = tuple(range(offs, end)) v = FieldSelectableInt(self, fs) self.fsi[field] = v - log("SVSHAPE setup field", field, offs, end) + log("SVSHAPE setup field", field, offs, end, v.asint(msb0=True)) offs = end def copy(self): @@ -53,6 +53,10 @@ class SVSHAPE(SelectableInt): "REMAP Triangle Mode" return self.mode == 0b11 and self._skip in [0b10, 0b11] + def is_bigmul(self): + "REMAP Bigmul (Modulo) Mode" + return self.mode == 0b11 and self._skip in [0b01, 0b11] + @property def submode2(self): return self.fsi['permute'].asint(msb0=True) @@ -95,10 +99,11 @@ class SVSHAPE(SelectableInt): @property def zdimsz(self): - z = self.fsi['zdimsz'].asint(msb0=True)+1 + if self.mode == 0b11: # no 3rd dimension in bigmul/triangle + return 1 if self.is_indexed(): - z = 1 # no z dimension when indexed - return z + return 1 # no z dimension when indexed + return self.fsi['zdimsz'].asint(msb0=True)+1 @zdimsz.setter def zdimsz(self, value): @@ -178,7 +183,9 @@ class SVSHAPE(SelectableInt): return remap def get_iterator(self): - log ("SVSHAPE get_iterator", self.mode, self.ydimsz, self.is_indexed()) + log ("SVSHAPE get_iterator", + self.mode, self.ydimsz, "index", self.is_indexed(), + "triangle", self.is_triangle()) if self.mode == 0b00: iterate_fn = iterate_indices elif self.mode == 0b10: @@ -189,7 +196,9 @@ class SVSHAPE(SelectableInt): iterate_fn = iterate_preduce_indices # parallel-reduce elif self.mode in [0b01, 0b11]: # further sub-selection - if self.ydimsz == 1: + if self.mode == 0b11: + iterate_fn = iterate_indices + elif self.ydimsz == 1: iterate_fn = iterate_butterfly_indices elif self.ydimsz in [2, 4]: iterate_fn = iterate_dct_inner_butterfly_indices @@ -199,6 +208,7 @@ class SVSHAPE(SelectableInt): iterate_fn = iterate_dct_inner_costable_indices elif self.ydimsz in [6, 14, 15]: iterate_fn = iterate_dct_inner_halfswap_loadstore + log ("SVSHAPE get_iterator", iterate_fn) # create a **NEW** iterator each time this is called return iterate_fn(self.copy())