From: Tobias Platen Date: Tue, 30 Mar 2021 19:28:16 +0000 (+0200) Subject: Merge branch 'master' of ssh://git.libre-riscv.org:922/soc X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=95427d58b413b090839c14d0dc5d7e0d5d32268e;p=soc.git Merge branch 'master' of ssh://git.libre-riscv.org:922/soc --- 95427d58b413b090839c14d0dc5d7e0d5d32268e diff --cc src/soc/decoder/isa/radixmmu.py index d51bb39f,a5ebafba..06c9e80e --- a/src/soc/decoder/isa/radixmmu.py +++ b/src/soc/decoder/isa/radixmmu.py @@@ -331,27 -330,12 +331,29 @@@ class RADIX print("prtable_addr",prtable_addr) # TODO check and loop if needed - assert(prtable_addr==0x1000000) - print("fetch data from PROCESS_TABLE_3") + #assert(prtable_addr==0x1000000) + #print("fetch data from PROCESS_TABLE_3") + data = self._next_level(prtable_addr, 8, False, False) + print("data",data) + #assert(data==0x40000000000300ad) + return "TODO verify" + + # rts = shift = unsigned('0' & data(62 downto 61) & data(7 downto 5)); + shift = selectconcat(SelectableInt(0,1), data[2:3], data[57:59]) + print("shift",shift) + # mbits := unsigned('0' & data(4 downto 0)); + mbits = selectconcat(SelectableInt(0,1), data[59:63]) + print("mbits",mbits) + + if mbits.value==0: + return "INVALID" + ret = self._segment_check(addr, mbits, shift) + print("ret",ret) + return ret """ + NOTE _ THIS IS CACHEING OF PGTBL3 / PGTBL0. WE DO NOT NEED TO DO THIS + if r.addr(63) = '1' then v.pgtbl3 := data; v.pt3_valid := '1';