From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Fri, 20 Jul 2018 05:06:35 +0000 (+0100)
Subject: add `define generator
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=9576ae688d21f5ce634d6b896a7c100f74357d8c;p=pinmux.git

add `define generator
---

diff --git a/src/bsv/peripheral_gen.py b/src/bsv/peripheral_gen.py
index ab68dcb..270bc80 100644
--- a/src/bsv/peripheral_gen.py
+++ b/src/bsv/peripheral_gen.py
@@ -1,6 +1,14 @@
 class PBase(object):
     pass
 
+    def axi_reg_def(self, start, name, idx):
+        name = name.upper()
+        offs = self.num_axi_regs32()*4
+        end = start + offs - 1
+        return ("    `define%(name)s%(idx)dBase  'h%(start)08x'\n" \
+                "    `define%(name)s%(idx)dEnd   'h%(end)08x'\n" % locals(),
+                offs)
+
 
 class uart(PBase):
     def importfn(self):